FT902Q-R datasheet(50/67 Pages) BRIDGETEK

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FT900

/1/2/3 Revision C Embedded Microcontroller Datasheet

Version 1.0

Document No. BRT_000172 Clearance No.: BRT#087

SD Host I/O pins dynamic characteristics for 25 MHz (Vcc (I/O) = 3.3V)

Parameter

Description

Conditions

Min

Max

Unit

TSCLK

clock period

on pin SD_CLK

TISU

data input setup time

TIH

data input hold time

TZO

data output valid delay time

TOZ

data output hold time

2.5

Table 5-17 - SD Host I/O pins (SD_CLK, SD_CMD, SD_DATA3/DATA2/DATA1/DATA0, SD_CD,

SD_WP) characteristics for 25 MHz

SD Host I/O pins dynamic characteristics for 50 MHz (Vcc (I/O) = 3.3V)

Parameter

Description

Conditions

Min

Max

Unit

TSCLK

clock period

on pin SD_CLK

TISU

data input setup time

TIH

data input hold time

TZO

data output valid delay time

TOZ

data output hold time

2.5

Table 5-18 - SD Host I/O pins (SD_CLK, SD_CMD, SD_DATA3/DATA2/DATA1/DATA0, SD_CD,

SD_WP) characteristics for 50 MHz

Figure 5-11 - Definition of SD Host Timing

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