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ADRF5032BCCZN-R7 数据表(PDF) 9 Page - Analog Devices

部件名 ADRF5032BCCZN-R7
功能描述  1 GHz to 60 GHz, Reflective, Silicon SPDT Switch
PDF  11 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADRF5032BCCZN-R7 数据表(HTML) 9 Page - Analog Devices

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Data Sheet
ADRF5032
THEORY OF OPERATION
analog.com
Rev. 0 | 9 of 11
The ADRF5032 can connect to CMOS/LVTTL-compatible control
interfaces directly.
The CTRL pin determines which RF port is in the insertion loss
state and in the isolation state. See Table 6 for the control voltage
truth table.
RF INPUT AND OUTPUT
The RF ports (RFC, RF1, and RF2) are DC-coupled to 0 V, and no
DC-blocking is required at the RF ports when the RF line potential
is equal to 0 V.
The RF ports are internally matched to 50 Ω. However, impedance
matching on transmission lines can be used to improve insertion
loss and return loss performance at high frequencies.
The ADRF5032 is bidirectional with equal power-handling capabili-
ties. The RF input signal can be applied to the RFC port or the
selected RF throw port.
The insertion loss path conducts the RF signal between the select-
ed RF throw port and the RF common port. The isolation paths
provide high loss between the insertion loss path and the unselect-
ed RF throw port that is reflective.
The power handling of the ADRF5032 derates with frequencies
below 3 GHz. See Figure 2 for derating of the RF power towards
lower frequencies.
POWER SUPPLY
The ADRF5032 requires that a positive supply voltage is applied
to the VDD pin and a negative supply voltage to the VSS pin.
Bypassing capacitors are recommended on the supply lines to
minimize RF coupling.
The unselected RF port of the ADRF5032 is reflective. The isolation
path provides high isolation between the unselected port and the
insertion loss path.
The ideal power-up sequence is as follows:
1. Connect GND.
2. Power up VDD and VSS. Power up VSS after VDD to avoid
current transients on VDD during ramp up.
3. Power up the digital control inputs. The relative order of the log-
ic control inputs is not important. However, powering the digital
control inputs before the VDD supply can inadvertently forward-
bias and damage the internal ESD-protection structures.
4. Apply signals to the RF input port. The design is bidirectional—
the input signal can be applied to the RFC port while the RF
throw ports are outputs or vice versa.
The ideal power-down sequence is the reverse of the above.
Table 6. Control Voltage Truth Table
Digital Control Input
RF Path
CTRL
RF1 to RFC
RF2 to RFC
Low
Isolation (off)
Insertion loss (on)
High
Insertion loss (on)
Isolation (off)



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