数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADRF5032BCCZN-R7 数据表(PDF) 10 Page - Analog Devices

部件名 ADRF5032BCCZN-R7
功能描述  1 GHz to 60 GHz, Reflective, Silicon SPDT Switch
PDF  11 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADRF5032BCCZN-R7 数据表(HTML) 10 Page - Analog Devices

Back Button ADRF5032BCCZN-R7 Datasheet HTML 3Page - Analog Devices ADRF5032BCCZN-R7 Datasheet HTML 4Page - Analog Devices ADRF5032BCCZN-R7 Datasheet HTML 5Page - Analog Devices ADRF5032BCCZN-R7 Datasheet HTML 6Page - Analog Devices ADRF5032BCCZN-R7 Datasheet HTML 7Page - Analog Devices ADRF5032BCCZN-R7 Datasheet HTML 8Page - Analog Devices ADRF5032BCCZN-R7 Datasheet HTML 9Page - Analog Devices ADRF5032BCCZN-R7 Datasheet HTML 10Page - Analog Devices ADRF5032BCCZN-R7 Datasheet HTML 11Page - Analog Devices  
Zoom Inzoom in Zoom Outzoom out
 10 / 11 page
background image
Data Sheet
ADRF5032
APPLICATIONS INFORMATION
analog.com
Rev. 0 | 10 of 11
EVALUATION BOARD
The ADRF5032 has two power-supply pins (VDD and VSS) and
one control pin (CTRL). Figure 16 shows the external components
and connections for the supply pin. The VDD and VSS pins are
decoupled with a 100 pF multilayer ceramic capacitor. The device
pinout allows the placement of the decoupling capacitors close to
the device. No other external components are needed for bias and
operation, except DC-blocking capacitors on the RF pins when the
RF lines are biased at a voltage other than 0 V. See Table 5 and the
Pin Configuration and Function Descriptions section for details.
Figure 16. Recommended Schematic
RECOMMENDATIONS FOR PRINTED CIRCUIT
BOARD DESIGN
The RF ports are matched to 50 Ω internally and the pinout is
designed to mate a coplanar waveguide (CPWG) with 50 Ω charac-
teristic impedance on the PCB. Figure 17 shows the referenced
CPWG RF trace design for an RF substrate with 8 mil thick Rogers
RO4003C dielectric material. RF trace with 16 mil width and 13 mil
clearance is recommended for 1.7 mil finished copper thickness.
Figure 17. Example PCB Stack-up
Figure 18 shows the routing of the RF traces, supply, and control
signals from the device. The ground planes are connected with
densely filled through vias for optimal RF and thermal performance.
The primary thermal path for the device is the bottom side.
Figure 18. PCB Layout
Figure 19 shows the recommended layout from the device RF pins
to the 50 Ω CPWG on the referenced stack-up. PCB pads are
drawn 1:1 to device pads. The ground pads are drawn soldermask
defined and the signal pads are drawn as pad defined. The RF
trace from the PCB pad is extended with the same width to
the package edge and tapered to RF trace. The paste mask is
designed to match the device pads without any aperture reduction.
The paste mask is divided into multiple openings for the paddle.
Figure 19. Recommended RF Pin Transition
For alternate PCB stack-ups with different dielectric thickness and
RF trace design, contact Analog Devices Technical Support for
further recommendations.



Html Pages

1 2 3 4 5 6 7 8 9 10 11


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com