| 数据搜索系统,热门电子元器件搜索 |
|
DFE252012PD-R47M 数据表(PDF) 30 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
DFE252012PD-R47M 数据表(HTML) 30 Page - Texas Instruments |
|
30 / 35 page ![]() 10.3 System Examples 10.3.1 Fixed Output Voltage Versions Versions with an internally fixed output voltage allow you to remove the external feedback voltage divider. This not only allows you to reduce the total solution size but also provides higher accuracy as there is no additional error caused by the external resistor divider. The FB pin must be tied to the output voltage directly as shown in Figure 10-57. Independent of that, the application shown runs with an internally defined switching frequency of 2.25 MHz by connecting COMP/FSET to GND. L 0.56 H m MODE/SYNC SW FB VIN V IN 2.75 V - V 6 C IN 22 mF C OUT 1 x 22 F m + 10 F m TPS62812x-Q1 EN V OUT GND PG SS/TR COMP/FSET C SS R 3 Figure 10-57. Schematic for Fixed Output Voltage Versions 10.3.2 Voltage Tracking The TPS6281x-Q1 follows the voltage applied to the SS/TR pin. A voltage ramp on SS/TR to 0.6 V ramps the output voltage according to the 0.6 V feedback voltage. Tracking the 3.3 V of device 1, such that both rails reach their target voltage at the same time, requires a resistor divider on SS/TR of device 2 equal to the output voltage divider of device 1. The output current of 2.5 µA on the SS/TR pin causes an offset voltage on the resistor divider formed by R5 and R6. The equivalent resistance of R5 // R6, so it must be kept below 15 kΩ. The current from SS/TR causes a slightly higher voltage across R6 than 0.6 V, which is desired because device 2 switches to its internal reference as soon as the voltage at SS/TR is higher than 0.6 V. In case both devices must run in forced PWM mode, TI recommends to tie the MODE pin of device 2 to the output voltage or the power good signal of device 1, the master device. The TPS6281x-Q1 has a duty cycle limitation defined by the minimum on-time. For tracking down to low output voltages, device 2 cannot follow after the minimum duty cycle is reached. Enabling PFM mode while tracking is in progress allows you to ramp down the output voltage close to 0 V. TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1 SLVSDU1J – AUGUST 2018 – REVISED MARCH 2023 www.ti.com 30 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TPS62810-Q1 TPS62811-Q1 TPS62812-Q1 TPS62813-Q1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |