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M25PE80 数据表(PDF) 7 Page - STMicroelectronics |
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M25PE80 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 61 page ![]() M25PE80 Description 7/61 Figure 3. VFQFPN and SO connections 1. There is an exposed central pad on the underside of the MLP8 package. This is pulled, internally, to VSS, and must not be allowed to be connected to any other voltage or signal line on the PCB. 2. See Package mechanical section for package dimensions, and how to identify pin-1. Figure 1. Logic diagram - previous T7Y process Figure 2. Logic diagram - new T9HX process Table 1. Signal names Signal name Function Direction C Serial Clock Input D Serial Data Input Q Serial Data Output S Chip Select Input TSL or W(1) 1. In the previous T7Y process the pin is a Top Sector Lock input whereas in the new T9HX process, the pin is a Write Protect input (see Figure 1 and Figure 2). Top Sector Lock or Write Protect Input Reset Reset Input VCC Supply voltage Input VSS Ground Reset AI10779 S VCC M25PE80 VSS TSL Q C D Reset AI13557 S VCC M25PE80 VSS W Q C D 1 AI10780b 2 3 4 8 7 6 5 D VSS C Reset Q SVCC TSL or W M25PE80 |
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