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M25PE80 数据表(PDF) 19 Page - STMicroelectronics |
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M25PE80 数据表(HTML) 19 Page - STMicroelectronics |
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19 / 61 page ![]() M25PE80 Memory organization 19/61 Figure 6. Block diagram 1. These features (in gray) are only available in the T7Y process. 1 31 1F000h 1FFFFh 0 15 0F000h 0FFFFh 16 10000h 10FFFh 4 04000h 04FFFh 3 03000h 03FFFh 2 02000h 02FFFh 1 01000h 01FFFh 0 00000h 00FFFh Table 5. Memory organization (continued) Sector Subsector Address Range Sector Subsector Address Range AI13560 S TSL or Control Logic High Voltage Generator I/O Shift Register Address Register and Counter 256 Byte Data Buffer 256 Bytes (Page Size) X Decoder C D Q Status Register 00000h FFFFFh 000FFh Reset F0000h Top 256 Pages can be made read-only by using the TSL pin(1) Whole Memory Array can be made read-only on a 64 Kbyte or 4 Kbyte(1) basis through the Lock Registers W |
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