Application information

STGIPL30C60

18/23

DocID029059 Rev 1

5.1

Recommendations

•

Input signal HIN is active high logic. A 85 k

Ω (typ.) pull-down resistor is built-in for each

high-side input. If an external RC filter is used for noise immunity, pay attention to the

variation of the input signal level.

•

Input signal LIN is active low logic. A 720 k

Ω (typ.) pull-up resistor, connected to an

internal 5 V regulator through a diode, is built-in for each low-side input.

•

To avoid the input signal oscillation, the wiring of each input should be as short as

possible.

•

By integrating HVIC application inside the module, direct coupling to MCU terminals

without any optocoupler.

•

Each capacitor should be very close to IPM pins.

•

Low inductance shunt resistors should be used for phase leg current sensing.

•

Electrolytic bus capacitors should be mounted on the module bus terminals as closer

as possible. Additional high frequency ceramic capacitors, mounted on module pins,

improve the performance.

•

The SD/OD signal should be pulled up to 5 V / 3.3 V with an external resistor (see

Section 4: Smart shutdown function for detailed information).

Note:

For further details refer to AN3338.

Table 15. Recommended operating conditions

Symbol

Parameter

Conditions

Value

Unit

Min.

Typ.

Max.

VPN

Supply voltage

Applied among P-Nu, Nv, Nw

300

400

V

VCC

Control supply voltage

Applied between VCC - GND

13.5

15

18

V

VBS

High-side bias voltage

Applied between VBOOTi - OUTi for

i = U, V, W

13

18

V

tdead

Blanking time to

prevent arm-short

For each input signal

1.5

µs

fPWM

PWM input signal

-40 °C < Tc < 100 °C

-40 °C < Tj < 125 °C

20

kHz

TC

Case operation

temperature

100

°C