Internal block diagram and pin configuration

STGIPL30C60

4/23

DocID029059 Rev 1

Table 2. Pin description

Pin

Symbol

Description

1OUTU

High-side reference output for U phase

2Vboot U

Bootstrap voltage for U phase

3LINU

Low-side logic input for U phase

4HINU

High-side logic input for U phase

5OP-U

Op-amp inverting input for U phase

6OPOUT U

Op-amp output for U phase

7OP+U

Op-amp non-inverting input for U phase

8CINU

Comparator input for U phase

9OUTV

High-side reference output for V phase

10

Vboot V

Bootstrap voltage for V phase

11

LINV

Low-side logic input for V phase

12

HINV

High-side logic input for V phase

13

OP-V

Op-amp inverting input for V phase

14

OPOUT V

Op-amp output for V phase

15

OP+V

Op-amp non-inverting input for V phase

16

CINV

Comparator input for V phase

17

OUTW

High-side reference output for W phase

18

Vboot W

Bootstrap voltage for W phase

19

LINW

Low-side logic input for W phase

20

HINW

High-side logic input for W phase

21

OP-W

Op-amp inverting input for W phase

22

OPOUT W

Op-amp output for W phase

23

OP+W

Op-amp non-inverting input for W phase

24

CINW

Comparator input for W phase

25

VCC

Low voltage power supply

26

SD/OD

Shutdown logic input (active low) / open drain (comparator output)

27

GND

Ground

28

T2

NTC thermistor terminal 2

29

T1

NTC thermistor terminal 1

30

NW

Negative DC input for W phase

31

W

W phase output

32

P

Positive DC input

33

NV

Negative DC input for V phase

34

V

V phase output