ILPS28QSW datasheet(36/52 Pages) STMICROELECTRONICS

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10.8

CTRL_REG3 (12h)

Control register 3 (R/W)

AH_QVAR_EN

AH_QVAR_

P_AUTO_EN

IF_ADD_INC

AH_QVAR_EN

Enables AH (analog hub) / Qvar functions. Default : 0

(0: disable; 1: enable)

AH_QVAR_P_AUTO_EN

Enables interleaved hardware mode for AH/Qvar and pressure data. Default : 0

(0: disable; 1: enable)

IF_ADD_INC

Default value: 1

(0: disable, 1: enable)

The IF_ADD_INC bit enables the address to be automatically incremented during a multiple byte access with a

serial interface (I²C or I3C).

The AH_QVAR_EN bit enables the AH (analog hub) and Qvar functions. The network of external connections and

electrodes must be designed in the final application if these functions need to be enabled. Refer to Figure 15. AH

(analog hub) / Qvar external connections to pin 2, pin 4.

The AH_QVAR_P_AUTO_EN bit enables the interleaved hardware mode: the device alternately generates

pressure data and AH / Qvar data. Before enabling this mode, the device must be configured in power-down

mode and the AH_QVAR_EN bit must be set to 0. This mode applies to both continuous and one-shot mode. The

least significant bit of the output data registers is set to 0 for pressure data and to 1 for AH/Qvar data.

For further information, refer to application note AN5778.

ILPS28QSW

CTRL_REG3 (12h)

DS13905 - Rev 1

page 36/52

ILPS28QSW 数据表(PDF) 36 Page - STMicroelectronics