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DFE252012F-R47M 数据表(PDF) 52 Page - Analog Devices |
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DFE252012F-R47M 数据表(HTML) 52 Page - Analog Devices |
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52 / 122 page ![]() NORMAL NORMAL(1) (1) POK FAULT POK FAULT(2) (2) (Mx_POK = 0) (Mx_POK = 0) SCP FAULT SCP FAULT(3) (3) (Mx_POK = 0, Mx_SCFLT = 1) (Mx_POK = 0, Mx_SCFLT = 1) LX THREE-STATE IMMEDIATELY, VOUT REGISTERS OF BUCKS ARE RESET tELAPSED < tPOK_TO VOUTx ≥ 82% of TARGET VOUTx < 20% OF TARGET OR OR tELAPSED ≥ tPOK_TO VIO ≤ VIO_UVLO_F VOUTx ≤ 78% OF TARGET 88)) 1) 1) EACH BUCK HAS AN INDEPENDENT FAULT STATE. 2) 2) IN POK FAULT STATE, THE INDIVIDUAL BUCK OUTPUT CAN STILL BE ENABLED OR DISABLED. 3) 3) SHORT-CIRCUIT FAULT EVENT DISABLES ONLY BUCK IN FAULT CONDITION AND RESETS VOUT REGISTERS OF CORRESPONDING BUCK. 4) 4) UVLO FAULT EVENT DISABLES ALL BUCKS AND RESETS VOUT REGISTERS OF ALL BUCKS. 5) 5) VIO FAULT EVENT DISABLES ALL BUCKS AND RESETS VOUT REGISTERS OF ALL BUCKS. 6) 6) OVER-TEMPERATURE FAULT EVENT DISABLES ALL BUCKS AND RESETS VOUT REGISTERS OF ALL BUCKS. 7) 7) AFTER 500ms OF FORCED DISABLE TIME, BUCK FAULT STATE IS AUTOMATICALLY CLEARED WHEN JUNCTION TEMPERATURE COOLS DOWN TO +140°C, IF THE AUTO_RSTRT BIT IS SET TO 1. 8) 8) ALL BUCK OUTPUTS MUST BE DISABLED TO CLEAR TSHDN FAULT, HOWEVER SCP FAULT IS CLEARED WHEN THE CORRESPONDING BUCK OUTPUT IS DISABLED. 9) 9) TRANSITION IS PREVENTED DURING SOFT-START AND SOFT- STOP. 10) 10) IF VSYS DROPS BELOW POR THRESHOLD (TYP 1.7V) OR VDD SUPPLY IS NOT VALID (< 1.55V, TYP), ALL FAULT STATE IS CLEARED. WAIT WAIT(7) (7) FORCED DISABLED FOR 500ms TSHDN FAULT TSHDN FAULT(6) (6) (TSHDN = 1) (TSHDN = 1) LX THREE-STATE IMMEDIATELY, VOUT REGISTERS OF ALL BUCKS ARE RESET VVIO IO FAULT FAULT(5) (5) (VIOFLT = 1) (VIOFLT = 1) LX THREE-STATE IMMEDIATELY, VOUT REGISTERS OF ALL BUCKS ARE RESET TJ ≥ +165°C TJ < +150°C AND AND Mx_EN = EN_Mx = FPS_Mx = 0 VIO > VIO_UVLO_R AUTO_RSTRT = 0 LATCH OFF LATCH OFF(8) (8) TJ < +150°C AND AND AUTO_RSTRT = 1 ANY STATE ANY STATE UVLO FAULT UVLO FAULT(4) (4) (UVLO = 1) (UVLO = 1) LX THREE-STATE IMMEDIATELY, VOUT REGISTERS OF ALL BUCKS ARE RESET VSYS > VUVLO_R VSYS ≤ VUVLO_F Figure 12. Fault-Protection State Diagram Detailed Description—Multifunction I/Os The MAX77542 has eight multifunction I/Os (MFIO1 through MFIO8) which can be configured as output enable, low- power mode, forced-PWM mode, external clock detection, clock output, output-voltage selection, POK output, FPS input, FPS output, system reset input, system reset output, thermal-warning output, GPIO, and ADC mux input. The default functions of the MFIOs are selected by the RCFG1 (see the Device Configuration (CFGx) section for more information) and they are individually selectable through the I2C interface. The I/O supply voltage (VIO) must be valid for the MFIOx to operate in the GPO function with push-pull mode. Each MFIO has a set of interrupt, interrupt mask, and status bits. When unmasked, the interrupt bit sets whenever activated input state toggles. MAX77542 16VIN/16A, Quad-Phase High-Efficiency Buck Converter www.analog.com Analog Devices | 52 |
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