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DFE252012F-R47M 数据表(PDF) 66 Page - Analog Devices |
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DFE252012F-R47M 数据表(HTML) 66 Page - Analog Devices |
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66 / 122 page ![]() TOPSYS_STAT (0x04) BIT 7 6 5 4 3 2 1 0 Field RESERVED[2:0] ALT_SWO VIOFLT UVLO TSHDN TWARN Reset 0x0 0x0 0x0 0x0 0x0 0x0 Access Type Read Only Read Only Read Only Read Only Read Only Read Only BITFIELD BITS TYPE DESCRIPTION DECODE RESERVED 7:5 O Reserved. Returns 0. ALT_SWO 4 O Alternate Input Switchover Status 0x0 = VDD, VL12, and VL34 LDOs are powered from SYS. 0x1 = VDD, VL12, and VL34 LDOs are powered from ALT_IN. VIOFLT 3 O VIO Fault Status 0x0 = VIO ≥ VIO_UVLO_R. 0x1 = VIO ≤ VIO_UVLO_F. UVLO 2 O SYS Undervoltage Lock-Out Status 0x0 = VSYS ≥ VUVLO_R. 0x1 = VSYS ≤ VUVLO_F. TSHDN 1 O Thermal-Shutdown Status 0x0 = TJ ≤ +150°C. 0x1 = TJ ≥ +165°C. TWARN 0 O Thermal-Warning Status 0x0 = TJ ≤ TWARN_TH[2:0]. 0x1 = TJ ≥ TWARN_TH[2:0]. DEVICE_CFG1 (0x06) BIT 7 6 5 4 3 2 1 0 Field PH_CFG[2:0] CFG1_LATCH[4:0] Reset 0x0 0x0 Access Type Read Only Read Only BITFIELD BITS TYPE DESCRIPTION DECODE PH_CFG 7:5 O Phase Configuration 0x0 = 1PH + 1PH + 1PH + 1PH (4 outputs). 0x1 = 2PH + 1PH + 1PH (3 outputs). 0x2 = 2PH + 2PH (2 outputs). 0x3 = 3PH + 1PH (2 outputs). 0x4 = 4PH (1 output). 0x5–0x7 = Reserved. CFG1_LAT CH 4:0 O CFG1 Latched Code DEVICE_CFG2 (0x07) BIT 7 6 5 4 3 2 1 0 Field RESERVED[2:0] CFG2_LATCH[4:0] Reset 0x0 0x0 Access Type Read Only Read Only BITFIELD BITS TYPE DESCRIPTION RESERVED 7:5 O Reserved. Returns 0. MAX77542 16VIN/16A, Quad-Phase High-Efficiency Buck Converter www.analog.com Analog Devices | 66 |
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