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DFE252012F-R47M 数据表(PDF) 115 Page - Analog Devices |
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DFE252012F-R47M 数据表(HTML) 115 Page - Analog Devices |
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115 / 122 page  COUT1 COUT1 COUT1 COUT1 COUT1 COUT1 COUT4 COUT4 COUT4 COUT4 COUT4 COUT4 COUT2 COUT2 COUT2 COUT2 COUT2 COUT2 COUT3 COUT3 COUT3 COUT3 COUT3 COUT3 CSYS CALT_IN CVIO CBST4 CBST3 OUT1 OUT2 OUT3 OUT4 LX1 PGND PGND AGND NOTE 1: INTERNAL SIGNALS ARE ROUTED OUT ON THE SECOND AND THIRD LAYERS OF THE PCB. SEE THE EV KIT LAYOUT FILES FOR AN EXAMPLE. AGND CBST1 CBST2 SCL SDA CE INNER BUMPS (SEE NOTE 1) Figure 15. PCB Layout Example Unused Outputs When an application has unused buck outputs, follow the guidelines below: ● Connect the unused inputs (INx) to the SYS. ● Leave the unused LXx and the BSTx pins unconnected (open). ● Connect the unused SNSxP and SNSxN inputs to ground (AGND). ● Connect the PGNDx pins to ground. ● Do not enable the unused buck outputs. The slave phases configured under master controllers must be connected according to Table 6. If an unused buck output MAX77542 16VIN/16A, Quad-Phase High-Efficiency Buck Converter www.analog.com Analog Devices | 115 |
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