ADN2530

Rev. A | Page 12 of 20

This provides excellent transmission line termination while

dissipating less power than a traditional resistor passive back-

termination. No portion of the modulation current flows in the

active back-termination resistance. All of the preset modulation

current IMOD, the range specified in Table 1, flows in the

external load. The equivalent circuits for MSET, IMODP, and

IMODN are shown in Figure 31 and Figure 32. The two 50 Ω

resistors in Figure 32 are not real resistors. They represent the

active back-termination resistance.

VCC

MSET

800

Ω

200

Ω

VCC

Figure 31. Equivalent Circuit of the MSET Pin

VCC

VCC

15

Ω

15

Ω

50

Ω

IMODP

IMODN

50

Ω

Figure 32. Equivalent Circuit of the IMODP and IMODN Pins

The recommended configuration of the MSET, IMODP, and

IMODN pins is shown in Figure 33. See Table 6 for recom-

mended components. When the voltage on DATAP is greater

than the voltage on DATAN, the modulation current flows into

the IMODP pin and out of the IMODN pin, generating an

optical Logic 1 level at the TOSA output when the TOSA is

connected as shown in Figure 33.

ADN2530

MSET

VMSET

GND

IMODN

IMODP

C

TOSA

C

L

VCC

L

VCC

VCC

L

L

IBIAS

Figure 33. Recommended Configuration for the

MSET, IMODP, and IMODN Pins

The ratio between the voltage applied to the MSET pin and the

differential modulation current available at the IMODP and

IMODN pins is a function of the load resistance value, as shown

in Figure 34.

10

10

45

40

35

30

25

20

15

140

130

120

110

100

90

80

70

60

50

40

30

20

DIFFERENTIAL LOAD RESISTANCE

MAX

TYP

MIN

Figure 34. MSET Voltage to Modulation Current Ratio vs.

Differential Load Resistance

Using the resistance of the TOSA, the user can calculate the

voltage range that should be applied to the MSET pin to

generate the required modulation current range (see the

example in the Applications Information section).

The circuit used to drive the MSET voltage must be able to

drive the 1 kΩ resistance of the MSET pin. To be able to drive

23 mA modulation currents through the differential load, the

output stage of the ADN2530 (IMODP and IMODN pins)

must be ac-coupled to the load. The voltages at these pins

have a dc component equal to VCC and an ac component with

single-ended peak-to-peak amplitude of IMOD × 50 Ω. This

100 Ω differential because the transmission line characteristic

impedance sets the peak-to-peak amplitude. For the case where

output stage, the voltages at the IMODP and IMODN pins must

be between the compliance voltage specifications for this pin

over supply, temperature, and modulation current range, as

shown in Figure 35. See the Headroom Calculations section for

examples of headroom calculations.

VCC

VCC – 0.7V

VCC + 0.7V

NORMAL OPERATION REGION

Figure 35. Allowable Range for the Voltage at IMODP and IMODN