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ISL8200MMREP 数据表(PDF) 21 Page - Renesas Technology Corp |
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ISL8200MMREP 数据表(HTML) 21 Page - Renesas Technology Corp |
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21 / 24 page ![]() ISL8200MM FN7690 Rev 2.00 Page 21 of 24 Mar 15, 2013 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DATE REVISION CHANGE February 1, 2013 FN7690.2 page 1: Sentence added to fourth paragraph: “For example, parallel 2 for 20A and up to 6 for 60A. The output voltage can be precisely regulated to as low as 0.6V with ±1% output voltage regulation over line, load, and temperature variations.” Pin Descriptions table page 3: Vout_Set: Changed “500” to “600” page 4: FF: Changed “The voltages on” to “the voltage on” Changed “Voltage Input 0.7 to Vcc” to "The input voltage range is 0.8V to Vcc." VIN: Changed "remained" to "remaining" Changed “Input Voltage Range 0V to 20V” to “The input voltage range is 4.5V to 20V.” PVCC: Changed “3V” to “4.5V” VCC: Changed “2.97V” to “4.5V” page 5: Phase Thermal Pad: Added “Connect this pad to a copper island on the PCB board with the same shape as the PHASE thermal pad.” PVIN Thermal Pad: Added “Connect this pad to a copper island on the PCB board with the same shape as the PVIN thermal pad.” PGND Thermal Pad: Added “Connect this pad to a copper island on the PCB board with the same shape as the PGND thermal pad.” VOUT Thermal Pad: Added “Connect this pad to a copper island on the PCB board with the same shape as the Vout thermal pad.” Recommended Operating Conditions, page 7 Input Voltage: Separated Vin and PVin into 2 lines Driver Bias Voltage, PVCC . . . . . . . . . . 3V to 5.6V (Changed “3V to 5.6V” to “4.5V to 5.6V”) Signal Bias Voltage, VCC . . . . . . . . . . . 3V to 5.6V (Changed “3V to 5.6V” to “4.5V to 5.6”) Maximum Current (IPVCC) . . . . . . . . . . . 250mA (Changed from 250 to 320) page 7, Electrical Spec table: Current (IPVCC) Changed TYP from 250 to 320 page 14, Input Supply Voltage section, 2nd paragraph added "it is recommended to add 0.5V to the result to account for temperature variations." Equation 2: Changed formula variable from “Vin” to “PVin” page 16, Current Share section: Changed "between ICs" to "between ICs, up to 3 phases" page 16: Overcurrent Protection: Changed: “In multi-module operation, by connecting modules’ ISHARE pin together, results in the VISHARE representing the average current of all active channels.” to: "Multi-module operation can be achieved by connecting the ISHARE pin of two or more modules together. In multi-module operation the voltage on the ISHARE pin correlates to the average current of all active channels." Changed: “The total system currents are compared with a precision 1.2V threshold to determine the overcurren condition as well as each channel having additional overcurrent trip point at 108μA with 7-cycle delay.” to: "The output current of each module in multi-module operation is compared to a precise 1.2V threshold to determine the overcurrent condition. Additionally, each module has an overcurrent trip point of 108μA with 7-cycle delay." page 20, Reflow Parameters, Changed the reflow profile (Figure 33) From: PEAK TEMPERATURE +230°C~+245°C; TYPICALLY 60s-70s ABOVE +220°C KEEP LESS THAN 30s WITHIN 5°C OF PEAK TEMP. SLOW RAMP (3°C/s MAX) AND SOAK FROM +100°C TO +180°C FOR 90s~120s To: PEAK TEMPERATURE +215°C~+220°C; TYPICALLY 60s-70s ABOVE +183°C KEEP LESS THAN 20s WITHIN 5°C OF PEAK TEMP. SLOW RAMP (3°C/s MAX) AND SOAK FROM +100°C TO +150°C FOR 6 0s~120s page 23, Package Outline Drawing updated from Rev 2 to Rev 3. Changes were: On page 2 in the "Typical recommended land pattern", changed number in upper left pad from 22 to 23 since this package has 23 I/O signal pads. |
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