ADL5310ACP-R2 datasheet(3/20 Pages) AD

3 / 20 page

ADL5310

Rev. A | Page 3 of 20

SPECIFICATIONS

VP = 5 V, VN = 0 V, TA = 25°C, RREF = 665 kΩ, and VRDZ connected to VREF, unless otherwise noted.

Table 1.

Parameter

Conditions

Min

Typ

Max

Unit

INPUT INTERFACE

Pins 1 to 6: INP1 and INP2, IRF1 and IRF2, VSUM

Specified Current Range, IPD

Flows toward INP1 pin or INP2 pin

3 n

3 m

Input Current Min/Max Limits

Flows toward INP1 pin or INP2 pin

10 m

Reference Current, IREF, Range

Flows toward IRF1 pin or IRF2 pin

3 n

3 m

Summing Node Voltage

Internally preset; user alterable

0.46

0.5

0.54

Temperature Drift

–40°C < TA < +85°C

0.030

mV/°C

Input Offset Voltage

VIN

− VSUM, VIREF − VSUM

−20

+20

LOGARITHMIC OUTPUTS

Pin 15 and Pin 16: LOG1 and LOG2

Logarithmic Slope

190

200

210

mV/dec

–40°C < TA < +85°C

185

215

mV/dec

Logarithmic Intercept1

165

300

535

–40°C < TA < +85°C

1940

Law Conformance Error

10 nA < IPD < 1 mA

0.1

0.4

3 nA < IPD < 3 mA

0.3

0.6

Wideband Noise2

IPD > 3 µA; output referred

0.5

µV/√Hz

Small Signal Bandwidth

IPD = 3 µA

1.5

MHz

Maximum Output Voltage

1.7

Minimum Output Voltage

Limited by VN = 0 V

0.10

Output Resistance

4.375

5.625

kΩ

REFERENCE OUTPUT

Pin 7 and Pin 24 (internally shorted): VREF

Voltage wrt Ground

2.45

2.5

2.55

–40°C < TA < +85°C

2.42

2.58

Maximum Output Current

Sourcing (grounded load)

Incremental Output Resistance

Load current < 10 mA

Ω

OUTPUT BUFFERS

Pins 12 to 14 and 17 to 19: OUT2, SCL2, BIN2, BIN1, SCL1,

and OUT1

Input Offset Voltage

−20

+20

Input Bias Current

Flowing out of Pins 13, 14, 17, and 18

0.4

µA

Incremental Input Resistance

MΩ

Incremental Output Resistance

Load current < 10 mA; gain = 1

0.5

Ω

Output High Voltage

RL = 1 kΩ to ground

−

0.1

Output Low Voltage

RL = 1 kΩ to ground

0.10

Peak Source/Sink Current

Small-Signal Bandwidth

Gain = 1

MHz

Slew Rate

0.2 V to 4.8 V output swing

V/µs

POWER SUPPLY

Pins 8 and 9: VPOS; Pins 10, 11, and 20: VNEG

Positive Supply Voltage

(VP – VN ) ≤ 12 V

Quiescent Current

Input currents < 10 µA

9.5

11.5

Negative Supply Voltage (Optional)

(VP – VN ) ≤ 12 V

−5.5

1 Other values of logarithmic intercept can be achieved by adjustment of RREF.

2 Output noise and incremental bandwidth are functions of input current; measured using output buffer connected for GAIN = 1.

ADL5310ACP-R2 数据表(PDF) 3 Page - Analog Devices

ADL5310ACP-R2 数据表(HTML) 3 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

数据表下载

链接网址

ADL5310ACP-R2 数据表(PDF) 3 Page - Analog Devices

ADL5310ACP-R2 数据表(HTML) 3 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

数据表 下载

链接网址

数据表下载