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ST7260 数据表(PDF) 29 Page - STMicroelectronics |
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ST7260 数据表(HTML) 29 Page - STMicroelectronics |
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29 / 117 page  ST7260 29/117 I/O PORTS (Cont’d) 9.2.1 Port A Table 10. Port A0, A3, A4, A5, A6, A7 Description Figure 19. PA0, PA3, PA4, PA5, PA6, PA7 Configuration PORT A I / O Alternate Function Input1 Output Signal Condition PA0 with pull-up push-pull MCO (Main Clock Output) MCO = 1 (MISCR) PA3 with pull-up push-pull Timer EXTCLK CC1 =1 CC0 = 1 (Timer CR2) PA4 with pull-up push-pull Timer ICAP1 IT1 Schmitt triggered input IT1E = 1 (ITIFRE) PA5 with pull-up push-pull Timer ICAP2 IT2 Schmitt triggered input IT2E = 1 (ITIFRE) PA62 with pull-up push-pull Timer OCMP1 OC1E = 1 IT3 Schmitt triggered input IT3E = 1 (ITIFRE) PA7 with pull-up push-pull Timer OCMP2 OC2E = 1 IT4 Schmitt triggered input IT4E = 1 (ITIFRE) 1Reset State 2Not available on SO24 DR DDR LATCH LATCH DR SEL DDR SEL VDD PAD ALTERNATE ENABLE ALTERNATE ENABLE ALTERNATE ENABLE ALTERNATE ALTERNATE INPUT PULL-UP OUTPUT P-BUFFER N-BUFFER 1 0 1 0 CMOS SCHMITT TRIGGER VSS VDD DIODES |
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