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ST7260 数据表(PDF) 49 Page - STMicroelectronics |
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ST7260 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 117 page  ST7260 49/117 16-BIT TIMER (Cont’d) Figure 33. One Pulse Mode Timing Example Figure 34. Pulse Width Modulation Mode Timing Example with 2 Output Compare Functions Note: On timers with only one Output Compare register, a fixed frequency PWM signal can be generated using the output compare and the counter overflow to define the pulse length. COUNTER FFFC FFFD FFFE 2ED0 2ED1 2ED2 2ED3 FFFC FFFD OLVL2 OLVL2 OLVL1 ICAP1 OCMP1 compare1 Note: IEDG1 = 1, OC1R = 2ED0h, OLVL1 = 0, OLVL2 = 1 01F8 01F8 2ED3 IC1R COUNTER 34E2 34E2 FFFC OLVL2 OLVL2 OLVL1 OCMP1 compare2 compare1 compare2 Note: OC1R = 2ED0h, OC2R = 34E2, OLVL1 = 0, OLVL2 = 1 FFFC FFFD FFFE 2ED0 2ED1 2ED2 |
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