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DSPIC30F 数据表(PDF) 140 Page - Microchip Technology |
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DSPIC30F 数据表(HTML) 140 Page - Microchip Technology |
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140 / 220 page ![]() dsPIC30F5011/5013 DS70116C-page 138 Preliminary 2004 Microchip Technology Inc. 20.2 Oscillator Configurations 20.2.1 INITIAL CLOCK SOURCE SELECTION While coming out of Power-on Reset or Brown-out Reset, the device selects its clock source based on: a) FOS<1:0> configuration bits that select one of four oscillator groups, b) and FPR<3:0> configuration bits that select one of 13 oscillator choices within the primary group. The selection is as shown in Table 20-2. TABLE 20-2: CONFIGURATION BIT VALUES FOR CLOCK SELECTION 20.2.2 OSCILLATOR START-UP TIMER (OST) In order to ensure that a crystal oscillator (or ceramic resonator) has started and stabilized, an Oscillator Start-up Timer is included. It is a simple 10-bit counter that counts 1024 TOSC cycles before releasing the oscillator clock to the rest of the system. The time-out period is designated as TOST. The TOST time is involved every time the oscillator has to restart (i.e., on POR, BOR and wake-up from Sleep). The Oscillator Start-up Timer is applied to the LP oscillator, XT, XTL, and HS modes (upon wake-up from Sleep, POR and BOR) for the primary oscillator. 20.2.3 LP OSCILLATOR CONTROL Enabling the LP oscillator is controlled with two elements: 1. The current oscillator group bits COSC<1:0>. 2. The LPOSCEN bit (OSCON register). The LP oscillator is on (even during Sleep mode) if LPOSCEN = 1. The LP oscillator is the device clock if: • COSC<1:0> = 00 (LP selected as main oscillator) and • LPOSCEN = 1 Keeping the LP oscillator on at all times allows for a fast switch to the 32 kHz system clock for lower power oper- ation. Returning to the faster main oscillator will still require a start-up time Oscillator Mode Oscillator Source FOS1 FOS0 FPR3 FPR2 FPR1 FPR0 OSC2 Function EC Primary 1 11 0 1 1 CLKO ECIO Primary 1 11 1 0 0 I/O EC w/ PLL 4x Primary 1 11 1 0 1 I/O EC w/ PLL 8x Primary 1 11 1 1 0 I/O EC w/ PLL 16x Primary 1 11 1 1 1 I/O ERC Primary 1 11 0 0 1 CLKO ERCIO Primary 1 11 0 0 0 I/O XT Primary 1 10 1 0 0 OSC2 XT w/ PLL 4x Primary 1 10 1 0 1 OSC2 XT w/ PLL 8x Primary 1 10 1 1 0 OSC2 XT w/ PLL 16x Primary 1 10 1 1 1 OSC2 XTL Primary 1 10 0 0 0 OSC2 FRC w/ PLL 4x Internal FRC 1 10 0 0 1 I/O FRC w/ PLL 8x Internal FRC 1 11 0 1 0 I/O FRC w/ PLL 16x Internal FRC 1 10 0 1 1 I/O HS Primary 1 10 0 1 0 OSC2 LP Secondary 0 0 —— —— (Notes 1, 2) FRC Internal FRC 0 1x x x x (Notes 1, 2) LPRC Internal LPRC 1 0 —— —— (Notes 1, 2) Note 1: OSC2 pin function is determined by the Primary Oscillator mode selection (FPR<3:0>). 2: OSC1 pin cannot be used as an I/O pin even if the secondary oscillator or an internal clock source is selected at all times. |
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