DSPIC30F datasheet(167/220 Pages) MICROCHIP

167 / 220 page

 2004 Microchip Technology Inc.

Preliminary

DS70116C-page 165

dsPIC30F5011/5013

23.0

ELECTRICAL CHARACTERISTICS

This section provides an overview of dsPIC30F electrical characteristics. Additional information will be provided in future

revisions of this document as it becomes available.

For detailed information about the dsPIC30F architecture and core, refer to

dsPIC30F Family Reference Manual

(DS70046).

Absolute maximum ratings for the dsPIC30F family are listed below. Exposure to these maximum rating conditions for

extended periods may affect device reliability. Functional operation of the device at these or any other conditions above

the parameters indicated in the operation listings of this specification is not implied.

Absolute Maximum Ratings(†)

Ambient temperature under bias............................................................................................................ .-40°C to +125°C

Storage temperature .............................................................................................................................. -65°C to +150°C

Voltage on any pin with respect to VSS (except VDD and MCLR) ................................................... -0.3V to (VDD + 0.3V)

Voltage on VDD with respect to VSS ......................................................................................................... -0.3V to +5.5V

Voltage on MCLR with respect to VSS (Note 1) ......................................................................................... 0V to +13.25V

Total power dissipation (Note 2) ............................................................................................................................... 1.0W

Maximum current out of VSS pin ........................................................................................................................... 300 mA

Maximum current into VDD pin .............................................................................................................................. 250 mA

Input clamp current, IIK (VI < 0 or VI > VDD) .......................................................................................................... ±20 mA

Output clamp current, IOK (VO < 0 or VO > VDD) ................................................................................................... ±20 mA

Maximum output current sunk by any I/O pin..........................................................................................................25 mA

Maximum output current sourced by any I/O pin .................................................................................................... 25 mA

Maximum current sunk by all ports ....................................................................................................................... 200 mA

Maximum current sourced by all ports .................................................................................................................. 200 mA

Note 1: Power dissipation is calculated as follows:

Pdis = VDD x {IDD -

∑ IOH} + ∑ {(VDD - VOH) x IOH} + ∑(VOl x IOL)

2: Voltage spikes below VSS at the MCLR/VPP pin, inducing currents greater than 80 mA, may cause latchup.

Thus, a series resistor of 50-100

Ω should be used when applying a “low” level to the MCLR/VPP pin, rather

than pulling this pin directly to VSS.

†NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

Note:

All peripheral electrical characteristics are specified. For exact peripherals available on specific

devices, please refer the the Family Cross Reference Table.

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