CS5421

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5

PACKAGE PIN DESCRIPTION (continued)

PACKAGE PIN #

FUNCTION

PIN SYMBOL

16 Lead SO Narrow

FUNCTION

PIN SYMBOL

10

Error amplifier inverting input for channel 2.

11

Input for the channel 2 PWM comparator.

12

A resistor from this pin to ground sets switching frequency.

13

Input Power supply pin.

14

PGND2

High Current ground for the GATE(H)2 and GATE(L)2 pins.

15

GATE(L)2

Low Side Synchronous FET driver pin for the channel 2 FET.

16

GATE(H)2

High Side Switch FET driver pin for the channel 2 FET.

Set

Dominant

LGND

PWM

Comparator 1

PWM

Comparator 2

Reset

Dominant

CURRENT

SOURCE

GEN

FAULT

BIAS

FAULT

R

S

R

S

R

S

RAMP1

GATE(H)1

5.0 μA

0.45 V

0.25 V

8.6 V

7.8 V

COMP1

−

+

−

+

−

+

−

−

+

−

−

COMP2

SGND

RAMP2

FAULT

FAULT

Reset

Dominant

GATE(L)1

PGND1

GATE(H)2

GATE(L)2

PGND2

RAMP1

RAMP2

CLK1

CLK2

OSC

0.45 V

1.0 V

E/A2

E/A OFF

E/A1

E/A OFF

Q

1.0 mA

1.0 V

Figure 2. Block Diagram