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74LVC595A 数据表(PDF) 9 Page - Nexperia B.V. All rights reserved

部件名 74LVC595A
功能描述  8-bit serial-in/serial-out or parallel-out shift register; 3-state
PDF  18 Pages
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制造商  NEXPERIA [Nexperia B.V. All rights reserved]
网页  https://www.nexperia.com/
标志 NEXPERIA - Nexperia B.V. All rights reserved

74LVC595A 数据表(HTML) 9 Page - Nexperia B.V. All rights reserved

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Nexperia
74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
-40 °C to +85 °C
-40 °C to +125 °C
Symbol Parameter
Conditions
Min
Typ[1]
Max
Min
Max
Unit
MR to SHCP; see Fig. 11
VCC = 1.65 V to 1.95 V
5.0
-2.7
-
5.5
-
ns
VCC = 2.3 V to 2.7 V
4.0
-1.5
-
4.5
-
ns
VCC = 2.7 V
2.0
-1.0
-
2.5
-
ns
trec
recovery time
VCC = 3.0 V to 3.6 V
2.0
-1.0
-
2.5
-
ns
SHCP or STCP; see Fig. 7
and Fig. 8
VCC = 1.65 V to 1.95 V
80
130
-
70
-
MHz
VCC = 2.3 V to 2.7 V
100
140
-
90
-
MHz
VCC = 2.7 V
110
150
-
100
-
MHz
fmax
maximum
frequency
VCC = 3.0 V to 3.6 V
130
180
-
115
-
MHz
tsk(o)
output skew time VCC = 3.0 V to 3.6 V
[5]
-
-
1.0
-
1.5
ns
VI = GND to VCC
[6]
VCC = 1.65 V to 1.95 V
-
50
-
-
-
pF
VCC = 2.3 V to 2.7 V
-
45
-
-
-
pF
CPD
power dissipation
capacitance
VCC = 3.0 V to 3.6 V
-
44
-
-
-
pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] ten is the same as tPZH and tPZL.
[4] tdis is the same as tPHZ and tPLZ.
[5] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[6] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC 2 x fi x N + Σ(CL x VCC 2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL x VCC 2 x fo) = sum of outputs.
11.1. Waveforms and test circuit
mna557
SHCP input
Q7S output
tPLH
tPHL
tW
1/fmax
VM
VOH
VI
GND
VOL
VM
Measurement points are given in Table 8.
VOL and VOH are typical output voltage drops that occur with the output load.
Fig. 7. The shift clock (SHCP) to serial data output (Q7S) propagation delays, the shift clock pulse width and
maximum shift clock frequency
74LVC595A
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 19 November 2021
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