Nexperia

74LVC595A

8-bit serial-in/serial-out or parallel-out shift register; 3-state

13. Abbreviations

Table 10. Abbreviations

Acronym

Description

CDM

Charged Device Model

CMOS

Complementary Metal Oxide Semiconductor

DUT

Device Under Test

ESD

ElectroStatic Discharge

HBM

Human Body Model

MM

Machine Model

TTL

Transistor-Transistor Logic

14. Revision history

Table 11. Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

74LVC595A v.3

20211119

Product data sheet

-

74LVC595A v.2

Modifications:

• The format of this data sheet has been redesigned to comply with the identity guidelines of

Nexperia.

• Legal texts have been adapted to the new company name where appropriate.

• Section 1 and Section 2 updated.

• Section 8: Derating values for Ptot total power dissipation have been updated.

74LVC595A v.2

20140620

Product data sheet

-

74LVC595A v.1

Modifications:

• The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

• Figure note for Fig. 6 added.

74LVC595A v.1

20070529

Product data sheet

-

-

74LVC595A

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 3 — 19 November 2021

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