LTM8024 datasheet(7/26 Pages) AD

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LTM4709

Rev. 0

For more information www.analog.com

PIN FUNCTIONS

NC (Pin A1): Not Connected. Do not connect this pin.

Leave the pin floating.

IMONR1, IMONR2, IMONR3 (Pins A2, F2, L2): Current

Limit Resistor Connected to IMON. A 1% accuracy 909Ω

resistor is integrated inside the module between these

pins and IMON pin. Directly connect these pins to GND to

set the current limit at 3.3A. To set the current limit lower

than 3A, select a resistor based on the pin description

for IMON, leave the IMONR pin floating, and connect the

resistor between the IMON pin and GND.

PGR1, PGR2, PGR3 (Pins A3, F3, L3): Pull-Up Resistor

Connected to PG1,2,3 (Pins E7, E2, K1). A 100k resistor

is integrated inside the module between these pins and

PG pins. Directly connect these pins to BIAS or any rail

to pull up PG pins.

BIAS1, BIAS2, BIAS3 (Pins A4, F4, L4): Bias Supply.

These pins supply current to the internal control circuitry

and the gate driving of the pass transistor. The three pins

could be connected together. To ensure proper opera-

tion, the BIAS voltage must satisfy the following condi-

tions: 2.375V ≤ VBIAS ≤ 5.5V and 1.2 + VOUT ≤ VBIAS.

IMON1, IMON2, IMON3 (Pins A5, F5, L5): Output Current

Monitor. The IMON pins source a current that typically

equals to IOUT/3000. If IMONR is floating, connect these

pins with a resistor to GND to produce a voltage pro-

portional to IOUT. Current limiting is triggered when the

voltage at these pins reaches 1V. The current limit equals

to 3000/resistance. For example, with a 1.5k resistor to

GND, these pins set the current limit at 2A.

These pins are internally connected to an IMONR pin with

a 1% accuracy 909Ω resistor. Users can directly connect

the IMONR pin to GND to set the current limit at 3.3A.

VREF1, VREF2, VREF3 (Pins A6, F6, L6): Reference Filter.

These pins have been connected to GND internally with

a 2.2µF ceramic capacitor to decrease the output noise

and provide a soft-start function to the reference. No

additional ceramic capacitor is required, and it can be

left floating in the application. Additional capacitor CREF

at this pin is optional. Additional CREF could be added if

lower noise below 1kHz is desired. For most applications,

no CREF is needed.

GND (Pins B1, B2, A7, B7, G1, G2, F7, G7, M1, M2, L7,

M7): Ground. To ensure proper performance, tie all GND

pins to the PCB ground.

VIN1, VIN2, VIN3 (Pins B3, B4, C1–C4, D1–D4; G3, G4,

H1–H4, J1–J4; M3, M4, N1–N4, P1–P4): Input Supply.

These pins supply power to the high current pass transis-

tor. The VIN pins can be connected together or separate.

The LTM4709 requires a decoupling capacitor at VIN to

maintain stability and lower input impedance over fre-

quency. An input bypass capacitor of no less than 4.7µF

is recommended for most applications. Minimize the trace

inductance between the decoupling capacitor and this pin

to optimize performance. The application that operates

with low VIN – VOUT voltage difference or that has large

and fast transient step may require higher input capaci-

tance to prevent the input supply from drooping.

VOUT1, VOUT2, VOUT3 (Pins B5, C5–C7, D5–D7; Pins G5,

H5–H7, J5–J7; Pins M5, N5–N7, P5–P7): Output. These

pins supply power to the load. A minimum output capaci-

tance of 10µF is required for stability. It is recommended

to place low ESR X5R or X7R dielectric ceramic capac-

itors directly between these pins and GND pins for best

performance. The large load step requires higher output

capacitance to meet transient requirements.

VOUTS1, VOUTS2, VOUTS3 (Pins B6, G6, M6): Kelvin Sense

for Output. These pins are the inverting input to the error

amplifier. Optimum regulation is obtained when it is con-

nected to the VOUT pins of the regulator. In some applica-

tions, the resistance of PCB traces between the regulator

and the load causes small voltage drops, creating a load

regulation error at the point of load. Connecting these pins

directly to the load to eliminate the voltage error.

VIOC1 (Pin E1): Voltage for In-to-Out Control. This pin

can be used to control the upstream buck regulator to

maintain a constant voltage for channel 1 of LTM4709 and

hence minimize its power dissipation. It can also be used

to control multiple channels when they are in parallel. See

Applications Information section for more information on

this function.

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