LPC804 datasheet(11/89 Pages) NXP

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LPC804

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Product data sheet

Rev. 2.1 — 25 July 2023

11 of 87

NXP Semiconductors

LPC804

32-bit Arm Cortex-M0+ microcontroller

Table 4.

Pin description

Symbol

Reset

state[1]

Type Description

PIO0_0/ACMP_I1/TDO

22 19 24

[2]

I; PU

PIO0_0 — General-purpose port 0

input/output 0.

In ISP mode, this is the U0_RXD pin (for

single supply devices).

In boundary scan mode: TDO (Test Data

Out).

ACMP_I1 — Analog comparator input 1.

PIO0_1/ADC_0/ACMP_I2/

TDI/CLKIN

15 12 17

[2]

I; PU

PIO0_1 — General-purpose port 0

input/output 1.

In boundary scan mode: TDI (Test Data In).

ACMP_I2 — Analog comparator input 2.

CLKIN — External clock input.

SWDIO/PIO0_2/

TMS

[3]

I; PU

SWDIO — Serial Wire Debug I/O. SWDIO

is enabled by default on this pin. In

boundary scan mode: TMS (Test Mode

Select).

I/O

PIO0_2 — General-purpose port 0

input/output 2.

SWCLK/PIO0_3/

TCK

[3]

I; PU

SWCLK — Serial Wire Clock. SWCLK is

enabled by default on this pin.

In boundary scan mode: TCK (Test Clock).

PIO0_3 — General-purpose port 0

input/output 3.

PIO0_4/ADC_11/

TRSTN

[2]

I; PU

PIO0_4 — General-purpose port 0

input/output 4.

In ISP mode, this pin is the U0_TXD pin (for

single supply devices).

In boundary scan mode: TRST (Test

Reset).

ADC_11 — ADC input 11.

RESET/PIO0_5

[5]

I; PU

RESET — External reset input: A

LOW-going pulse as short as 50 ns on this

pin resets the device, causing I/O ports and

peripherals to take on their default states,

and processor execution to begin at

address 0.

The RESET pin can be left unconnected or

be used as a GPIO or for any movable

function if an external RESET function is

not needed.

PIO0_5 — General-purpose port 0

input/output 5.

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