The desaturation sensing circuit consists of the blanking capacitor (minimum100 pF for Si8286 and 220 pF for Si8285), 100 Ω current

limiting resistor, and DSAT diode. These components provide current and voltage protection for the Si828x desaturation (DSAT) pin. It

is critical to place the resistor and diode as close to the switch as possible and the capacitor as close to the DSAT pin as possible. On

the layout, ensure that the loop formed between these components and the switch is minimized for optimal desaturation detection.

High-frequency oscillation can occur at the driver's output when the following conditions are met: (1) input signals set driver's output to

high state, (2) the voltage across the switching device is constantly above VDESAT, and (3) the RSTb is held low. The oscillation is due

to the continuous and simultaneous DESAT detection and reset cycles. The oscillation frequency in this DESAT/Reset cycle is in the

MHz range and can heat up and damage the Si828x.

To avoid this condition, it is recommended to implement the following DESAT fault reset sequence:

1. Fault detected (FLTb goes low).

2. Set inputs to achieve low output state.

3. Bring RSTb low (minimum 350 ns) to clear the DESAT fault. Refer to Figure 4.5 Device Reaction to Desaturation Event on page

16.

4. Verify fault cleared (FLTb high).

5. Run diagnostic to identify system fault condition

6. Resume operation when it is safe.

3.1.4.1 Soft Shutdown

When soft shut down is activated, the high-power driver goes inactive, and a weak pull-down via VH and external RH discharges the

gate until the gate voltage level is reduced to the VSSB + 2 V level. The high power driver is then turned on to clamp the SiC FET or

IGBT gate voltage to VSSB.

After the soft shut down, the Si828x driver output voltage is clamped low to keep the SiC FET or IGBT in the off state.

3.1.5 Driver Outputs

The Si8285 has VH and VL gate drive outputs (see Figure 3.1 Example Si8285 Application Circuit on page 7). They work with external

RH and RL resistors to limit output gate current. The value of these resistors can be adjusted to independently control SiC FET drain

or IGBT collector voltage rise and fall time. The Si8286 only has one VO gate drive output with an external gate resistor to control

SiC FET drain or IGBT collector voltage rise and fall time (see Figure 3.2 Example Si8286 Application Circuit on page 7). To achieve

independent rise and fall time control, it is suggested to add a pair of fast diodes to the Si8286 VO circuit (see Figure 3.3 Example

Si8286 Application Circuit with RH and RL on page 8).

The CLMP output should be connected to the gate of the SiC FET or IGBT directly to provide clamping action between the gate

and VSSB pin. This clamping action dissipates the switch's Miller effect current to secure the switch in the off-state. Negative VSSB

provides further help to ensure the gate voltage stays below the switch's Vth during the off state.

Si8285/86 Data Sheet • Applications Information

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com

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Rev. 2.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • October 12, 2021

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