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MB90F347CE 数据表(PDF) 34 Page - fujitsu semiconductor |
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MB90F347CE 数据表(HTML) 34 Page - fujitsu semiconductor |
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34 / 85 page  MB90340E Series 34 (Continued) Address Register Abbreviation Access Resource name Initial value 000060H Timer Control Status 0 TMCSR0 R/W 16-bit Reload Timer 0 00000000B 000061H Timer Control Status 0 TMCSR0 R/W XXXX0000B 000062H Timer Control Status 1 TMCSR1 R/W 16-bit Reload Timer 1 00000000B 000063H Timer Control Status 1 TMCSR1 R/W XXXX0000B 000064H Timer Control Status 2 TMCSR2 R/W 16-bit Reload Timer 2 00000000B 000065H Timer Control Status 2 TMCSR2 R/W XXXX0000B 000066H Timer Control Status 3 TMCSR3 R/W 16-bit Reload Timer 3 00000000B 000067H Timer Control Status 3 TMCSR3 R/W XXXX0000B 000068H A/D Control Status 0 ADCS0 R/W A/D Converter 000XXXX0B 000069H A/D Control Status 1 ADCS1 R/W 0000000XB 00006AH A/D Data 0 ADCR0 R 00000000B 00006BH A/D Data 1 ADCR1 R XXXXXX00B 00006CH ADC Setting 0 ADSR0 R/W 00000000B 00006DH ADC Setting 1 ADSR1 R/W 00000000B 00006EH Reserved 00006FH ROM Mirror Function Select ROMM W ROM Mirror XXXXXXX1B 000070H to 00008FH Reserved for CAN Controller 0/1. Refer to “ ■ CAN CONTROLLERS” 000090H to 00009AH Reserved 00009BH DMA Descriptor Channel Specified Register DCSR R/W DMA 00000000B 00009CH DMA Status L Register DSRL R/W 00000000B 00009DH DMA Status H Register DSRH R/W 00000000B 00009EH Address Detect Control Register 0 PACSR0 R/W Address Match Detection 0 00000000B 00009FH Delayed Interrupt Trigger/Release Register DIRR R/W Delayed Interrupt XXXXXXX0B 0000A0H Low-power Mode Control Register LPMCR W,R/W Low Power Control Circuit 00011000B 0000A1H Clock Selection Register CKSCR R,R/W Low Power Control Circuit 11111100B 0000A2H, 0000A3H Reserved 0000A4H DMA Stop Status Register DSSR R/W DMA 00000000B |
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