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MB90F347CE 数据表(PDF) 59 Page - fujitsu semiconductor |
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MB90F347CE 数据表(HTML) 59 Page - fujitsu semiconductor |
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59 / 85 page ![]() MB90340E Series 59 (3) Power On Reset (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0.0 V) (4) Clock Output Timing (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz) Parameter Symbol Pin Condition Value Unit Remarks Min Max Power on rise time tR VCC ⎯ 0.05 30 ms Power off time tOFF VCC 1 ⎯ ms Due to repetitive operation Parameter Symbol Pin Condition Value Unit Remarks Min Max Cycle time tCYC CLK ⎯ 62.5 ⎯ ns fCP = 16 MHz 41.76 ⎯ ns fCP = 24 MHz CLK ↑ → CLK ↓ tCHCL CLK ⎯ 20 ⎯ ns fCP = 16 MHz 13 ⎯ ns fCP = 24 MHz VCC VCC VSS 3 V tR tOFF 2.7 V 0.2 V 0.2 V 0.2 V Holds RAM data If you change the power supply voltage too rapidly, a power on reset may occur. We recommend that you startup smoothly by restraining voltages when changing the power supply voltage during operation, as shown in the figure below. Perform while not using the PLL clock. However, if voltage drops are within 1 V/s, you can operate while using the PLL clock. We recommend a rise of 50 mV/ms maximum. CLK 2.4 V tCYC 2.4 V 0.8 V tCHCL |
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