STE10A datasheet(29/82 Pages) STMICROELECTRONICS

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STE10/100A

Functional description

29/82

D3hot (Software visible D3)

When the STE10/100A is brought back to D0 from D3hot the software must perform a full

initialization.

The STE10/100A in the D3hot state responds to configuration cycles as long as power and

clock are supplied. This requires the device to perform an internal reset and return to a

power-up reset condition without the RST# pin asserted.

Table 3.

Power stage

Device

state

PCI bus

state

Function

context

Clock

Power

Supported

actions to

function

Supported

actions from

function

Full function context

in place

Full speed

Full

power

Any PCI

transaction

Any PCI

transaction or

interrupt

B0, B1

Configuration

maintained. No Tx

and Rx except wake-

up events

Stopped to

full speed

PCI

configuration

access

Only wake-up

events

B0, B1,

Configuration

maintained. No Tx

and Rx

Stopped to

full speed

PCI

configuration

access(B0, B1)

D3hot

B0, B1,

Configuration lost,

full initialization

required upon return

to D0

Stopped to

full speed

PCI

configuration

access(B0, B1)

D3cold

All configuration lost.

Power-on defaults in

place on return to

No clock

power

Power-on reset

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