Custom Silicon Solutions, Inc. ©2009

9

Version 1.1, May 2009

CSS555C

Micropower Timer (with Internal Timing Capacitor)

Supply Current Considerations

The internal supply current used by the CSS555C can be

divided into three main components:

1) ~ 1.8uA constant current (independent of VDD)

2) ~ 6 M

from VDD to GND (0.5uA at VDD = 3V)

3) ~ 0.5uA switching current at VDD = 3V, FOSC = 100KHz

(~ linearly proportional to VDD & FOSC)

To minimize the second component, keep VDD as low as

possible. To minimize the switching current, keep VDD &

FOSC low. (Choose a lower multiplier value so the oscillator

frequency is well below 100 KHz.)

The external current is determined by the values of RA and

RB. They should be as high as practical. (PCB surface

leakage typically limits the value to ≤10M .)

The CSS555C has a “Break-Before-Make” driver for the

OUTPUT signal. This circuit eliminates the large “through

current” that flows directly from VDD to GND during each

output transition.

This significantly reduces the noise

injected into the power supply. The discharge path in the

monostable configuration is another source of transient

current.

(When VTH reaches the upper trip point, the

capacitor is very quickly discharged to GND.) To minimize

this transient current, simply add a resistor (RLIM) in series

with the DISCHARGE pin. (see Figure 18) The value of

RLIM must be low enough to allow the timing capacitor to

completely discharge before the next timing cycle.

A

typical value for RLIM is 1K

to 10K .

Figure 18 – Monostable with RLIM

ESD Protection

All input and output pins include protection devices to

guard against ESD damage. A simplified schematic of the

input protection circuit is shown in Figure 19. The voltage

levels at all pins should be kept between (VSS – 0.3V) and

(VDD +0.3V) to prevent forward biasing the diodes.

Figure 19 – Input Protection Circuit

Internal Timing Capacitor

The internal timing capacitor is a Poly/Poly structure which

has excellent stability over temperature (TC ~ 25 ppm/°C)

and voltage (VC ~ 250 ppm/V). It consists of a fixed 75pF

capacitor (CTIB) and a 0pF to 40pF trim capacitor (CTIA).

Eight EEPROM bits store the trim setting with a step size of

~ 0.16pF. The value is set at final package test, but may

be re-adjusted by the user. (See application note AN555-1

for more details.)

The third capacitor, CS, is the stray

capacitance due to the pad cell, bond wire and package

leadframe. It is typically 5pF.

Figure 20 – Internal 100pF Timing Capacitor

Ordering Information

Part

Number

Package

Description

Shipping

Options

CSS555C-ID

8 pin plastic DIP

50 units / Rail

CSS555C-IS

8 pin plastic SOIC

98 units / Rail

CSS555C-ISTR

8 pin plastic SOIC

2500 units /

Tape & Reel

CSS555C_IW

Die or

Tested Wafers

Contact CSS

for options

CSS555C_DVK

Development Kit

N.A.

Table 6 – Ordering Options

All packaging options use lead free materials. All part

types are rated for operation from -40°C to +85°C.

The default configuration stored in EEPROM is:

Configuration Data =

80HEX

Operating Mode =

Standard 555

Power Setting =

Micro

Voltage Setting =

Standard

Timing Capacitor =

Trimmed to 100pF

Packaged

parts

may

be

ordered

with

alternate

configuration settings. A minimum purchase and/or service

charge may apply. Please contact CSS for details.

Development Kit

The “CSS555C Development Kit” is a PC based system

that allows the user to Read and Program the internal

EEPROM. It includes an easy to use dialog box and serial

interface (USB port required). The circuit card includes

plenty of extra terminals so that most applications can be

built and evaluated quickly and easily.

For more

information, please refer to the development kit’s

instruction manual.

VDD

RA

Trigger

Output

Reset

CT

VDD

Dischg

Thresh

Control

CSS555C

VSS

Trigger

Output

Reset

RLIM

Optional

VTH

VDD

Input/Output

Pin

Input Protection

Diodes

To Internal

Circuits

CTIA

0pF - 40pF

Poly/Poly

Capacitor

8

EETRIM

CTIB

75pF

CS

5pF

THRESHOLD

PIN