STMPE811 datasheet(28/66 Pages) STMICROELECTRONICS

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Interrupt system

STMPE811

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Doc ID 14489 Rev 5

GPIO_INT_EN

GPIO interrupt enable register

Address:

0x0C

Type:

R/W

Reset:

0x00

Description:

The GPIO interrupt register enables the GPIO interruption of a particular GPIO

source to the host.

GPIO_INT_STA

GPIO interrupt status register

Address:

0x0D

Type:

Reset:

0x00

Description:

The GPIO interrupt status register monitors the status of the interruption from a

particular GPIO pin interrupt source to the host. Regardless of whether or not the

GPIO_INT_STA bits are enabled, the corresponding GPIO_STA bits are still updated.

The ISG[7:0] bits are the interrupt status bits corresponding to the GPIO[7:0] pins.

Writing '1' to this register clears the corresponding bits. Writing '0' has no effect.

7654

IEG[x]

[7:0] IEG[x]: Interrupt enable GPIO mask (where x = 7 to 0)

1: Writing ‘1’ to the IE[x] bit enables the interruption to the host

7654

ISG[x]

[7:0] ISG[x]: GPIO interrupt status (where x = 7 to 0)

Read:

Interrupt status of the GPIO[x]. Reading the register clears any bits that have been set to '1'

Write:

Writing to this register has no effect

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