STMPE811 datasheet(29/66 Pages) STMICROELECTRONICS

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STMPE811

Interrupt system

Doc ID 14489 Rev 5

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ADC_INT_EN

ADC interrupt enable register

Address:

0x0E

Type:

R/W

Reset:

0x00

Description:

The ADC enable register enables the interruption of a particular ADC source to the

host.

ADC_INT_STA

ADC interrupt status register

Address:

0x0F

Type:

Reset:

0x00

Description:

The ADC interrupt status register monitors the status of the interruption from a

particular ADC source to the host. Regardless of whether or not the ADC_INT_EN

bits are enabled, the corresponding ADC_STA bits are still updated. The ISA[7:0] bits

are the interrupt status bits corresponding to the ADC[7:0] pins. Writing '1' to this

7654

IEAC[x]

[7:0] IEAC[x]: Interrupt enable ADC mask (where x = 7 to 0)

1: Writing ‘1’ to the IE[x] bit enables the interruption to the host

7654

ISA[x]

[7:0] ISA[x]: ADC interrupt status (where x = 7 to 0)

Read:

Interrupt status of the ADC[x]. Reading the register clears any bits that have been set to '1'

Write:

Writing to this register has no effect.

Note: Refer to Table 13 for the associated ADC intput pins to each ADC channels.

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