WM8720

Production Data

w

PD Rev 4.0. February 2005

7

ML/12S

MC/IWL

MD/DM

t

MLS

t

MLH

t

MLL

t

MCH

t

MCL

t

MCY

t

MDS

t

MDH

Figure 3 Program Register Input Timing

Test Conditions

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Program Register Input Information

MC/IWL pulse cycle time

100

ns

MC/IWL pulse width low

40

ns

MD/DM pulse width high

40

ns

MD/DM set-up time

20

ns

MC/IWL hold time

20

ns

ML/I2S pulse width low

20

ns

ML/I2S set-up time

20

ns

ML/I2S hold time

20

ns

Notes:

1.

Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured “A”

weighted over a 20Hz to 20kHz bandwidth.

2.

All performance measurements done with 20kHz low pass filter. Failure to use such a filter will result in higher

THD+N and lower SNR and Dynamic Range readings than are found in the Electrical Characteristics.

The low

pass filter removes out of band noise; although it is not audible it may affect dynamic specification values.