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AT89C5131A-RDTIM 数据表(PDF) 10 Page - ATMEL Corporation

部件名 AT89C5131A-RDTIM
功能描述  8-bit Flash Microcontroller with Full Speed USB Device
PDF  186 Pages
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制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

AT89C5131A-RDTIM 数据表(HTML) 10 Page - ATMEL Corporation

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10
AT89C5130A/31A-M
4337G–USB–11/06
Table 10.
USB Signal Description
Table 11.
System Signal Description
Signal
Name
Type
Description
Alternate
Function
D+
I/O
USB Data + signal
Set to high level under reset.
-
D-
I/O
USB Data - signal
Set to low level under reset.
-
VREF
O
USB Reference Voltage
Connect this pin to D+ using a 1.5 k
Ω resistor to use the Detach function.
-
Signal
Name
Type
Description
Alternate
Function
AD[7:0]
I/O
Multiplexed Address/Data LSB for external access
Data LSB for Slave port access (used for 8-bit and 16-bit modes)
P0[7:0]
A[15:8]
I/O
Address Bus MSB for external access
P2[7:0]
RD
I/O
Read Signal
Read signal asserted during external data memory read operation.
Control input for slave port read access cycles.
P3.7
WR
I/O
Write Signal
Write signal asserted during external data memory write operation.
Control input for slave write access cycles.
P3.6
RST
O
Reset Input
Holding this pin low for 64 oscillator periods while the oscillator is running
resets the device. The Port pins are driven to their reset conditions when a
voltage lower than VIL is applied, whether or not the oscillator is running.
This pin has an internal pull-up resistor which allows the device to be reset
by connecting a capacitor between this pin and VSS.
Asserting RST when the chip is in Idle mode or Power-down mode returns
the chip to normal operation.
This pin is tied to 0 for at least 12 oscillator periods when an internal reset
occurs ( hardware watchdog or power monitor).
-
ALE
O
Address Latch Enable Output
The falling edge of ALE strobes the address into external latch. This signal
is active only when reading or writing external memory using MOVX
instructions.
-
PSEN
I/O
Program Strobe Enable / Hardware conditions Input for ISP
Used as input under reset to detect external hardware conditions of ISP
mode.
-
EA
I
External Access Enable
This pin must be held low to force the device to fetch code from external
program memory starting at address 0000h.
-
Table 12.
Power Signal Description
Signal
Name
Type
Description
Alternate
Function
AVSS
GND
Analog Ground
AVSS is used to supply the on-chip PLL and the USB PAD.
-



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