AD8137

Rev. B | Page 18 of 24

APPLICATIONS

ANALYZING A TYPICAL APPLICATION WITH

Typical Connection and Definition of Terms

Figure 63 shows a typical connection for the AD8137, using

terminal sets the output common-mode voltage. The two

in a balanced fashion in response to an input signal.

+

–

–

+

AD8137

Figure 63. Typical Connection

The differential output voltage is defined as

ON

OP

dm

O,

V

V

V

−

=

(1)

Common-mode voltage is the average of two voltages. The

output common-mode voltage is defined as

2

,

ON

OP

cm

O

V

V

V

+

=

(2)

Output Balance

matched in amplitude and how precisely they are 180° out of

phase with each other. It is the internal common-mode feed-

back loop that forces the signal component of the output

common-mode towards zero, resulting in the near perfectly

balanced differential outputs of identical amplitude and exactly

180° out of phase. The output balance performance does not

require tightly matched external components, nor does it

require that the feedback factors of each loop be equal to each

other. Low frequency output balance is ultimately limited by

the mismatch of an on-chip voltage divider.

Output balance is measured by placing a well-matched resistor

divider across the differential voltage outputs and comparing

the signal at the divider’s midpoint with the magnitude of the

differential output. By this definition, output balance is equal to

the magnitude of the change in output common-mode voltage

divided by the magnitude of the change in output differential-

mode voltage:

dm

O

cm

O

V

V

Balance

Output

,

,

∆

∆

=

(3)

The differential negative feedback drives the voltages at the

other.

AP

AN

V

V

=

(4)

The common-mode feedback loop drives the output common-

mode voltage, sampled at the midpoint of the two internal

common-mode tap resistors in Figure 61, to equal the voltage

2

, dm

O

OCM

OP

V

V

V

+

=

(5)

and

2

, dm

O

OCM

ON

V

V

V

−

=

(6)

ESTIMATING NOISE, GAIN, AND BANDWITH WITH

MATCHED FEEDBACK NETWORKS

Estimating Output Noise Voltage and Bandwidth

The total output noise is the root-sum-squared total of several

statistically independent sources. Since the sources are statisti-

cally independent, the contributions of each must be individu-

ally included in the root-sum-square calculation. Table 7 lists

recommended resistor values and estimates of bandwidth and

output differential voltage noise for various closed-loop gains.

For most applications, 1% resistors are sufficient.

Table 7. Recommended Values of Gain-Setting Resistors,

and Voltage Gain for Various Closed-Loop Gains

Gain

3 dB

Bandwidth (MHz)

Total Output

Noise (nV/√Hz)

1

1 k

1 k

72

18.6

2

1 k

2 k

40

28.9

5

1 k

5 k

12

60.1

10

1 k

10 k

6

112.0