PCF85063ATTSLASHAJ datasheet(14/55 Pages) NXP

14 / 55 page

NXP Semiconductors

PCF85063A

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

Bit

Symbol

Value

Description

6 to 0

OFFSET[6:0]

see Table 12

offset value

Table 11. Offset - offset register (address 02h) bit description...continued

[1]

Default value.

For MODE = 0, each LSB introduces an offset of 4.34 ppm. For MODE = 1, each LSB introduces an offset of

4.069 ppm. The offset value is coded in two’s complement giving a range of +63 LSB to -64 LSB.

OFFSET[6:0]

Offset value in ppm

Offset value in decimal

Normal mode

MODE = 0

Fast mode

MODE = 1

011 1111

+63

+273.420

+256.347

011 1110

+62

+269.080

+252.278

000 0010

+8.680

+8.138

000 0001

+4.340

+4.069

000 0000[1]

0[1]

111 1111

-1

-4.340

-4.069

111 1110

-2

-8.680

-8.138

100 0001

-63

-273.420

-256.347

100 0000

-64

-277.760

-260.416

Table 12. Offset values

[1]

Default value.

The correction is made by adding or subtracting clock correction pulses, thereby changing the period of a single

second but not by changing the oscillator frequency.

It is possible to monitor when correction pulses are applied. To enable correction interrupt generation, bit CIE

(register Control_1) has to be set logic 1. At every correction cycle, a pulse is generated on pin INT. The pulse

width depends on the correction mode. If multiple correction pulses are applied, an interrupt pulse is generated

for each correction pulse applied.

7.2.3.1 Correction when MODE = 0

The correction is triggered once every two hours and then correction pulses are applied once per minute until

the programmed correction values have been implemented.

Correction value

Update every nth hour

Minute

Correction pulses on INT

per minute[1]

+1 or -1

+2 or -2

00 and 01

+3 or -3

00, 01, and 02

Table 13. Correction pulses for MODE = 0

PCF85063A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7.1 — 8 November 2023

14 / 55

PCF85063ATT/AJ 数据表(PDF) 14 Page - NXP Semiconductors

PCF85063ATT/AJ 数据表(HTML) 14 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

数据表下载