PCF85063ATTSLASHAJ datasheet(53/55 Pages) NXP

53 / 55 page

NXP Semiconductors

PCF85063A

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

Tables

Tab. 1.

Ordering information ..........................................1

Tab. 2.

Ordering options ................................................2

Tab. 3.

Pin description ...................................................3

Tab. 4.

Registers overview ............................................5

Tab. 5.

Control_1 - control and status register 1

(address 00h) bit description .............................5

Tab. 6.

First increment of time circuits after STOP

bit release ..........................................................7

Tab. 7.

Registers reset values ...................................... 9

Tab. 8.

Control_2 - control and status register 2

(address 01h) bit description ...........................10

Tab. 9.

Effect of bits MI and HMI on INT generation ....12

Tab. 10. CLKOUT frequency selection ..........................13

Tab. 11. Offset - offset register (address 02h) bit

description ....................................................... 13

Tab. 12. Offset values ................................................... 14

Tab. 13. Correction pulses for MODE = 0 .....................14

Tab. 14. Effect of correction pulses on frequencies

for MODE = 0 ................................................. 15

Tab. 15. Correction pulses for MODE = 1 .....................16

Tab. 16. Effect of correction pulses on frequencies

for MODE = 1 ................................................. 16

Tab. 17. RAM_byte - 8-bit RAM register (address

03h) bit description ..........................................18

Tab. 18. Seconds - seconds register (address 04h)

bit description .................................................. 18

Tab. 19. Seconds coded in BCD format ........................18

Tab. 20. Minutes - minutes register (address 05h) bit

description ....................................................... 19

Tab. 21. Hours - hours register (address 06h) bit

description ....................................................... 19

Tab. 22. Days - days register (address 07h) bit

description ....................................................... 20

Tab. 23. Weekdays - weekdays register (address

08h) bit description ..........................................20

Tab. 24. Weekday assignments .................................... 20

Tab. 25. Months - months register (address 09h) bit

description ....................................................... 20

Tab. 26. Month assignments in BCD format ..................21

Tab. 27. Years - years register (0Ah) bit description ......21

Tab. 28. Second_alarm - second alarm register

(address 0Bh) bit description .......................... 23

Tab. 29. Minute_alarm - minute alarm register

(address 0Ch) bit description .......................... 23

Tab. 30. Hour_alarm - hour alarm register (address

0Dh) bit description ......................................... 23

Tab. 31. Day_alarm - day alarm register (address

0Eh) bit description ......................................... 24

Tab. 32. Weekday_alarm - weekday alarm register

(address 0Fh) bit description ...........................24

Tab. 33. Timer_value - timer value register (address

10h) bit description ..........................................25

Tab. 34. Timer_mode - timer control register

(address 11h) bit description ........................... 26

Tab. 35. Timer clock frequency and timer durations ......26

Tab. 36. First period delay for timer counter value T ..... 27

Tab. 37. INT operation .................................................. 28

Tab. 38. I2C slave address byte ................................... 30

Tab. 39. Limiting values ................................................ 32

Tab. 40. Static characteristics ....................................... 33

Tab. 41. I2C-bus characteristics ....................................38

Tab. 42. SnPb eutectic process (from J-STD-020D) ..... 45

Tab. 43. Lead-free process (from J-STD-020D) ............45

Tab. 44. Selection of Real-Time Clocks ........................ 48

Tab. 45. Abbreviations ...................................................49

Tab. 46. Revision history ...............................................50

Figures

Fig. 1.

Block diagram of PCF85063A ...........................2

Fig. 2.

Pin configuration for SO8 (PCF85063AT) ......... 3

Fig. 3.

Pin configuration for DFN2626-10

(PCF85063ATL) .................................................3

Fig. 4.

Pin configuration for TSSOP8

(PCF85063ATT) ................................................ 3

Fig. 5.

Handling address registers ............................... 4

Fig. 6.

STOP bit functional diagram ............................. 7

Fig. 7.

STOP bit release timing ....................................8

Fig. 8.

Software reset command .................................. 9

Fig. 9.

Interrupt scheme ............................................. 11

Fig. 10.

INT example for MI ......................................... 12

Fig. 11.

Offset calibration calculation workflow .............17

Fig. 12.

Result of offset calibration ...............................17

Fig. 13.

OS flag ............................................................ 19

Fig. 14.

Data flow for the time function ........................ 22

Fig. 15.

Access time for read/write operations ............. 22

Fig. 16.

Alarm function block diagram ..........................25

Fig. 17.

General countdown timer behavior ................. 27

Fig. 18.

Bit transfer .......................................................28

Fig. 19.

Definition of START and STOP conditions ...... 29

Fig. 20.

System configuration .......................................29

Fig. 21.

Acknowledgement on the I2C-bus .................. 30

Fig. 22.

Master transmits to slave receiver (WRITE

mode) .............................................................. 30

Fig. 23.

Master reads after setting register address

(write register address; READ data) ................31

Fig. 24.

Device diode protection diagram of

PCF85063A .....................................................32

Fig. 25.

Typical IDD with respect to fSCL .....................35

Fig. 26.

Typical IDD as a function of temperature ........ 36

Fig. 27.

Typical IDD with respect to VDD .....................37

Fig. 28.

IDD with respect to quartz RS .........................38

Fig. 29.

Oscillator frequency variation with respect

to VDD ............................................................ 38

Fig. 30.

I2C-bus timing diagram; rise and fall times

refer to 30 % and 70 % .................................. 40

Fig. 31.

Application diagram for PCF85063A ............... 40

PCF85063A

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Product data sheet

Rev. 7.1 — 8 November 2023

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