LTM4680 datasheet(7/36 Pages) AD

7 / 36 page

LTM4650-2

Rev. 0

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PIN FUNCTIONS

to ground will set a soft-start ramp rate. The remaining

channel can be set up as the subordinate and have the

main’s output applied through a voltage divider to the

subordinate output’s track pin. This voltage divider equals

the subordinate output’s feedback divider for coincidental

tracking. See the Applications Information section.

COMP1, COMP2 (E6, E7): Current control threshold and

error amplifier compensation point for each channel. The

current comparator threshold increases with this control

voltage. An external RC filter circuit is required for con-

trol loop compensation. See the Applications Information

section. Connect the COMP pins together for parallel

operation. Do not drive this pin.

DIFFP (E8): Positive input of the remote sense amplifier.

This pin is connected to the remote sense point of the

output voltage. See the Applications Information section.

DIFFN (E9): Negative input of the remote sense amplifier.

This pin is connected to the remote sense point of the

output GND. See the Applications Information section.

MODE_PLLIN (F4): Forced Continuous Mode, Burst

Mode Operation, or Pulse-Skipping Mode Selection Pin

and External Synchronization Input to Phase Detector

Pin. Connect this pin to SGND to force both channels

into the forced continuous mode of operation. Connect to

INTVCC to enable the pulse-skipping mode of operation.

Leaving the pin floating will enable Burst Mode operation.

A clock on the pin will force both channels into continuous

mode of operation and synchronized to the external clock

applied to this pin.

RUN1, RUN2 (F5, F9): Run Control Pin. A voltage above

1.25V will turn on each channel in the module. A volt-

age below 1.25V on the RUN pin will turn off the related

channel. Each RUN pin has a 1µA pull-up current; once

the RUN pin reaches 1.2V, an additional 4.5µA pull-up

current is added to this pin.

DIFFOUT (F8): Internal Remote Sense Amplifier Output.

Connect this pin to VOUTS1 or VOUTS2 depending, on which

output is using remote sense. In parallel operation, con-

nect one of the VOUTS pin to DIFFOUT for remote sensing.

SW1, SW2 (G2, G11): Switching node of each channel

that is used for testing purposes. Also, an R-C snubber

network can be applied to reduce or eliminate switch node

ringing or otherwise leave floating. See the Applications

Information section.

PHASMD (G4): Connect this pin to SGND, INTVCC, or

floating this pin to select the phase of CLKOUT to 60

degrees, 120 degrees, and 90 degrees respectively.

CLKOUT (G5): Clock output with phase control using the

PHASMD pin to enable multiphase operation between

devices. See the Applications Information section.

PGOOD1, PGOOD2 (G9, G8): Output Voltage Power Good

Indicator. Open drain logic output that is pulled to ground

when the output voltage is not within ±10% of the regula-

tion point.

INTVCC (H8): Internal 5V Regulator Output. The control

circuits and internal gate drivers are powered from this

voltage. Decouple this pin to PGND with a 4.7µF low ESR

tantalum or ceramic. INTVCC is activated when either

RUN1 or RUN2 is activated.

TEMP (J6): Temperature Monitor. An internal diode con-

nected the NPN transistor between this pin and SGND

with a 10nF filtering capacitor. See the Applications

Information section.

EXTVCC (J7): External power input that is enabled through

a switch to INTVCC whenever EXTVCC is greater than 4.7V.

Do not exceed 6V on this input, and connect this pin to

VIN when operating VIN on 5V. An efficiency increase will

occur, which is a function of the (VIN – INTVCC) multiplied

by the power MOSFET driver current. The typical current

requirement is 30mA. VIN must be applied before EXTVCC,

and EXTVCC must be removed before VIN.

VIN (M2–M11, L2–L11, J2–J4, J9–J11, K2–K4, K9–K11):

Power Input Pins. Apply input voltage between these pins

and GND pins. Recommend placing input decoupling

capacitance directly between VIN pins and GND pins.

(Recommended to use test points to monitor signal pin connections.)

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