ST10F276 datasheet(32/229 Pages) STMICROELECTRONICS

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Internal Flash memory

ST10F276

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4.4.4

Flash control register 1 high

The Flash control register 1 high (FCR1H), together with Flash control register 1 low

(FCR1L), is used to select the sectors to erase, or during any write operation to monitor the

status of each sector and each bank of the module selected by SMOD bit of FCR0H. First

diagram shows FCR1H meaning when SMOD=0; the second one when SMOD=1.

During any erase operation, these bits are automatically set and give the status of the 2

sectors of Bank 1 (B1F1-B1F0). The meaning of B1Fy bit for sector y of bank 1 is given by

the next Table 10. These bits are automatically reset at the end of a erase operation if no

errors are detected.

FCR1H (0x0E 0006) SMOD=0

FCR

Reset value: 0000h

987

65432

reserved

B3S B2S

reserved

B3F1 B3F0

FCR1H (0x0E 0006) SMOD=1

FCR

Reset value: 0000h

987

65432

reserved

B1S B0S

reserved

B1F1 B1F0

RSRS

Table 9.

Flash control register 1 high

Bit

Function

SMOD=0 (XFLASH selected)

B3F(1:0)

Bank 3 XFLASH sector 1:0 status

During any erase operation, these bits are automatically set and give the status of the

2 sectors of bank 3 (B3F1-B3F0). The meaning of B3Fy bit for sector y of bank 1 is

given by the next Table 10. These bits are automatically reset at the end of a erase

operation if no errors are detected.

B(3:2)S

Bank 3-2 status (XFLASH)

During any erase operation, these bits are automatically modified and give the status

of the 2 Banks (B3-B2). The meaning of BxS bit for bank x is given in the next

Table 10. These bits are automatically reset at the end of a erase operation if no errors

are detected.

SMOD=1 (IFLASH selected)

B1F(1:0)

Bank 1 IFLASH sector 1:0 status

During any erase operation, these bits are automatically set and give the status of the

2 sectors of bank 1 (B1F1-B1F0). The meaning of B1Fy bit for sector y of bank 1 is

given by the next Table 10. These bits are automatically reset at the end of a erase

operation if no errors are detected.

B(1:0)S

Bank 1-0 status (IFLASH)

During any erase operation, these bits are automatically modified and give the status

of the 2 banks (B1-B0). The meaning of BxS bit for bank x is given in the next

Table 10. These bits are automatically reset at the end of a erase operation if no errors

are detected.

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