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TMD2621 数据表(PDF) 17 Page - OSRAM GmbH |
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TMD2621 数据表(HTML) 17 Page - OSRAM GmbH |
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17 / 59 page ![]() Page 16 Datasheet, Public Document Feedback [v4-00] 2023-Apr-12 TMD2621 − Register O ver view IPTAT Register (Address 0x1A) Figure 19: IPTAT Register Enable Register (Address 0x80) Figure 20: ENABLE Register Preset each applicable registers and its bits as per required operation before activating PON. After PON is set, it is required to wait 100μs settling time and then enable PEN. In order to modify register configurations during operation, it is required to set PEN=PON=0 firstly to avoid any unexpected behavior or corrupted proximity results. Disabling PON resets the device state machine, but all the register values will retain. After the configuration change done, set the PON bit and wait 100μs settling time, and then enable PEN to re-activate the corresponding functionalities. Addr: 0x1A IPTAT Bit Bit Name Default Access Bit Description 7:5 Reserved 000 RW Reserved. Must be set to default value. 4:0 IPTAT 00111 RW The IPTAT value needs to be changed from its default value to be “00011b” during device initialization. Addr: 0x80 ENABLE Bit Bit Name Default Access Bit Description 7PVSYNC_EN 0 RW This bit enables proximity integration synced with VSYNC. 6 Reserved 0 RW Reserved. Must be set to default value. 5TEN 0 RW This bit activates temperature measurement after every proximity measurement. 4PWEN 0 RW This bit activates the proximity wait feature which is set by the PWTIME register. Active high. 3 Reserved 0 RW Reserved. Must be set to default value. 2 PEN 0 RW This bit activates the proximity detection. Active high. 1 Reserved 0 RW Reserved. Must be set to default value. 0PON 0 RW Power ON. This field activates the internal oscillator and ADC channels. Active high. |
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