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AD9516-2/PCBZ 数据表(PDF) 26 Page - Analog Devices |
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AD9516-2/PCBZ 数据表(HTML) 26 Page - Analog Devices |
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26 / 84 page ![]() AD9516-2 Rev. 0 | Page 26 of 84 DETAILED BLOCK DIAGRAM PROGRAMMABLE N DELAY REFIN (REF1) REFIN (REF2) CLK CLK REF1 REF2 AD9516-2 STATUS STATUS R DIVIDER VCO STATUS PROGRAMMABLE R DELAY REFERENCE SWITCHOVER REF_ SEL CPRSET VCP VS GND RSET DISTRIBUTION REFERENCE REFMON CP STATUS LD P, P + 1 PRESCALER A/B COUNTERS N DIVIDER BYPASS LF LOW DROPOUT REGULATOR (LDO) VCO PHASE FREQUENCY DETECTOR LOCK DETECT CHARGE PUMP HOLD OUT0 OUT1 OUT0 OUT1 LVPECL DIVIDE BY 1 TO 32 OUT2 OUT3 OUT2 OUT3 LVPECL DIVIDE BY 1 TO 32 OUT4 OUT5 OUT4 OUT5 LVPECL DIVIDE BY 1 TO 32 DIVIDE BY 1 TO 32 LVDS/CMOS ΔT ΔT DIVIDE BY 1 TO 32 DIVIDE BY 1 TO 32 LVDS/CMOS ΔT ΔT DIVIDE BY 1 TO 32 0 1 DIVIDE BY 2, 3, 4, 5, OR 6 PD SYNC RESET SCLK SDIO SDO CS DIGITAL LOGIC SERIAL CONTROL PORT OUT6 (OUT6A) OUT6 (OUT6B) OUT7 (OUT7A) OUT7 (OUT7B) OUT8 (OUT8A) OUT8 (OUT8B) OUT9 (OUT9A) OUT9 (OUT9B) Figure 41. Detailed Block Diagram |
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