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MFS5600AMBAFES 数据表(PDF) 49 Page - NXP Semiconductors |
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MFS5600AMBAFES 数据表(HTML) 49 Page - NXP Semiconductors |
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49 / 118 page ![]() NXP Semiconductors FS5600 Automotive buck regulator and controller with voltage monitors and watchdog timer aaa-031018 WD_ERR_LIMIT = 11 WD_ERR_LIMIT = 10 WD_ERR_LIMIT = 01 0 0 1 2 3 4 WD refresh NOT OK WD refresh OK WD refresh OK WD refresh OK WD refresh OK WD refresh OK WD refresh OK WD refresh OK WD refresh OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK 0 1 2 3 4 5 6 WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh OK 2 1 WD OFF WD refresh OK WD OFF WD refresh OK WD OFF WD_ERR_LIMIT = 00 WD refresh OK WD refresh OK WD refresh OK WD refresh OK WD refresh OK 0 1 2 3 4 5 6 WD refresh OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh OK 7 8 WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh OK WD OFF WD refresh NOT OK WD refresh NOT OK Figure 14. Watchdog error counter configurations 17.3.4 Watchdog refresh counter The watchdog refresh strategy is available for the challenger and simple watchdog schemes. Each time the watchdog is properly refreshed, the watchdog refresh counter is incremented by ’1’. Each time the watchdog refresh counter reaches its maximum value (‘6’ by default) and if next WD refresh is also good, the fault error counter (FLT_ERR_CNT) is decremented by ’1’. Whatever the position the watchdog refresh counter is in, each time there is a wrong refresh watchdog, the watchdog refresh counter is reset to ’0’. To allow flexibility in the application, the maximum value of this watchdog refresh counter is configurable with the WD_RFR_LIMIT[1:0] register. WD_RFR_LIMIT[1:0] Watchdog refresh counter value 00 (reset) 6 01 4 10 2 11 1 Table 42. Watchdog refresh counter configuration The watchdog refresh counter value can be read by the MCU for diagnostics with the WD_RFR_CNT[2:0] bits. FS5600 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 29 April 2024 49 / 118 |
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