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MPC855T 数据表(PDF) 13 Page - Freescale Semiconductor, Inc |
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MPC855T 数据表(HTML) 13 Page - Freescale Semiconductor, Inc |
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13 / 80 page  MPC860 Family Hardware Specifications, Rev. 7 Freescale Semiconductor 13 Bus Signal Timing B7a CLKOUT to TSIZ(0:1), REG, RSV, AT(0:3), BDIP, PTR invalid 7.58 — 6.25 — 5.00 — 3.80 — ns B7b CLKOUT to BR, BG, FRZ, VFLS(0:1), VF(0:2) IWP(0:2), LWP(0:1), STS invalid 4 7.58 — 6.25 — 5.00 — 3.80 — ns B8 CLKOUT to A(0:31), BADDR(28:30) RD/WR, BURST, D(0:31), DP(0:3) valid 7.58 14.33 6.25 13.00 5.00 11.75 3.80 10.04 ns B8a CLKOUT to TSIZ(0:1), REG, RSV, AT(0:3) BDIP, PTR valid 7.58 14.33 6.25 13.00 5.00 11.75 3.80 10.04 ns B8b CLKOUT to BR, BG, VFLS(0:1), VF(0:2), IWP(0:2), FRZ, LWP(0:1), STS valid 4 7.58 14.33 6.25 13.00 5.00 11.75 3.80 10.04 ns B9 CLKOUT to A(0:31), BADDR(28:30), RD/WR, BURST, D(0:31), DP(0:3), TSIZ(0:1), REG, RSV, AT(0:3), PTR High-Z 7.58 14.33 6.25 13.00 5.00 11.75 3.80 10.04 ns B11 CLKOUT to TS, BB assertion 7.58 13.58 6.25 12.25 5.00 11.00 3.80 11.29 ns B11a CLKOUT to TA, BI assertion (when driven by the memory controller or PCMCIA interface) 2.50 9.25 2.50 9.25 2.50 9.25 2.50 9.75 ns B12 CLKOUT to TS, BB negation 7.58 14.33 6.25 13.00 5.00 11.75 3.80 8.54 ns B12a CLKOUT to TA, BI negation (when driven by the memory controller or PCMCIA interface) 2.50 11.00 2.50 11.00 2.50 11.00 2.50 9.00 ns B13 CLKOUT to TS, BB High-Z 7.58 21.58 6.25 20.25 5.00 19.00 3.80 14.04 ns B13a CLKOUT to TA, BI High-Z (when driven by the memory controller or PCMCIA interface) 2.50 15.00 2.50 15.00 2.50 15.00 2.50 15.00 ns B14 CLKOUT to TEA assertion 2.50 10.00 2.50 10.00 2.50 10.00 2.50 9.00 ns B15 CLKOUT to TEA High-Z 2.50 15.00 2.50 15.00 2.50 15.00 2.50 15.00 ns B16 TA, BI valid to CLKOUT (setup time) 9.75 — 9.75 — 9.75 — 6.00 — ns B16a TEA, KR, RETRY, CR valid to CLKOUT (setup time) 10.00 — 10.00 — 10.00 — 4.50 — ns B16b BB, BG, BR, valid to CLKOUT (setup time) 5 8.50 — 8.50 — 8.50 — 4.00 — ns B17 CLKOUT to TA, TEA, BI, BB, BG, BR valid (hold time) 1.00 — 1.00 — 1.00 — 2.00 — ns B17a CLKOUT to KR, RETRY, CR valid (hold time) 2.00 — 2.00 — 2.00 — 2.00 — ns Table 7. Bus Operation Timings (continued) Num Characteristic 33 MHz 40 MHz 50 MHz 66 MHz Unit Min Max Min Max Min Max Min Max |
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