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MPC8271VRM 数据表(PDF) 29 Page - Freescale Semiconductor, Inc |
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MPC8271VRM 数据表(HTML) 29 Page - Freescale Semiconductor, Inc |
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29 / 60 page ![]() MPC8272 PowerQUICC II™ Family Hardware Specifications, Rev. 1.5 Freescale Semiconductor 29 Clock Configuration Modes 1100_000 Reserved 1100_001 Reserved 1100_010 Reserved 1 The “low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not exceed the frequency rating of the user’s device. The minimum CPU frequency is 150 MHz for commercial temperature devices and 175 MHz for extended temperature devices. The minimum CPM frequency is 120 MHz. 2 PCI_MODCK determines the PCI clock frequency range. Refer to Table 17 for lower range configurations. 3 MODCK_H = hard reset configuration word [28–31] (refer to Section 5.4 in the MPC8260 User’s Manual). MODCK[1-3] = three hardware configuration pins. 4 CPM multiplication factor = CPM clock/bus clock 5 CPU multiplication factor = Core PLL multiplication factor Table 17. Clock Configurations for PCI Host Mode (PCI_MODCK=1) 1, 2 Mode 3 Bus Clock (MHz) CPM Multiplication Factor 4 CPM Clock (MHz) CPU Multiplication Factor 5 CPU Clock (MHz) PCI Division Factor PCI Clock (MHz) MODCK_H- MODCK[1-3] Low High Low High Low High Low High Default Modes (MODCK_H=0000) 0000_000 60.0 100.0 2 120.0 200.0 2.5 150.0 250.0 4 30.0 50.0 0000_001 50.0 100.0 2 100.0 200.0 3 150.0 300.0 4 25.0 50.0 0000_010 60.0 120.0 2.5 150.0 300.0 3 180.0 360.0 6 25.0 50.0 0000_011 60.0 120.0 2.5 150.0 300.0 3.5 210.0 420.0 6 25.0 50.0 0000_100 60.0 120.0 2.5 150.0 300.0 4 240.0 480.0 6 25.0 50.0 0000_101 50.0 100.0 3 150.0 300.0 3 150.0 300.0 6 25.0 50.0 0000_110 50.0 100.0 3 150.0 300.0 3.5 175.0 350.0 6 25.0 50.0 0000_111 50.0 100.0 3 150.0 300.0 4 200.0 400.0 6 25.0 50.0 Full Configuration Modes 0001_000 50.0 100.0 3 150.0 300.0 5 250.0 500.0 6 25.0 50.0 0001_001 50.0 100.0 3 150.0 300.0 6 300.0 600.0 6 25.0 50.0 0001_010 50.0 100.0 3 150.0 300.0 7 350.0 700.0 6 25.0 50.0 0001_011 50.0 100.0 3 150.0 300.0 8 400.0 800.0 6 25.0 50.0 Table 16. Clock Configurations for PCI Host Mode (PCI_MODCK=0) 1, 2 (continued) Mode 3 Bus Clock (MHz) CPM Multiplication Factor 4 CPM Clock (MHz) CPU Multiplication Factor 5 CPU Clock (MHz) PCI Division Factor PCI Clock (MHz) MODCK_H- MODCK[1-3] Low High Low High Low High Low High |
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