数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

SST39SF040 数据表(PDF) 3 Page - Silicon Storage Technology, Inc

部件名 SST39SF040
功能描述  1 Mbit / 2 Mbit / 4 Mbit (x8) Multi-Purpose Flash
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  SST [Silicon Storage Technology, Inc]
网页  http://www.sst.com/
标志 SST - Silicon Storage Technology, Inc

SST39SF040 数据表(HTML) 3 Page - Silicon Storage Technology, Inc

  SST39SF040 Datasheet HTML 1Page - Silicon Storage Technology, Inc SST39SF040 Datasheet HTML 2Page - Silicon Storage Technology, Inc SST39SF040 Datasheet HTML 3Page - Silicon Storage Technology, Inc SST39SF040 Datasheet HTML 4Page - Silicon Storage Technology, Inc SST39SF040 Datasheet HTML 5Page - Silicon Storage Technology, Inc SST39SF040 Datasheet HTML 6Page - Silicon Storage Technology, Inc SST39SF040 Datasheet HTML 7Page - Silicon Storage Technology, Inc SST39SF040 Datasheet HTML 8Page - Silicon Storage Technology, Inc SST39SF040 Datasheet HTML 9Page - Silicon Storage Technology, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 24 page
background image
Data Sheet
1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39SF010A / SST39SF020A / SST39SF040
3
©2003 Silicon Storage Technology, Inc.
S71147-06-000
8/04
Data# Polling (DQ7)
When the SST39SF010A/020A/040 are in the internal Pro-
gram operation, any attempt to read DQ7 will produce the
complement of the true data. Once the Program operation
is completed, DQ7 will produce true data. Note that even
though DQ7 may have valid data immediately following the
completion of an internal Write operation, the remaining
data outputs may still be invalid: valid data on the entire
data bus will appear in subsequent successive Read
cycles after an interval of 1 µs. During internal Erase opera-
tion, any attempt to read DQ7 will produce a ‘0’. Once the
internal Erase operation is completed, DQ7 will produce a
‘1’. The Data# Polling is valid after the rising edge of fourth
WE# (or CE#) pulse for Program operation. For Sector- or
Chip-Erase, the Data# Polling is valid after the rising edge
of sixth WE# (or CE#) pulse. See Figure 7 for Data# Polling
timing diagram and Figure 16 for a flowchart.
Toggle Bit (DQ6)
During the internal Program or Erase operation, any con-
secutive attempts to read DQ6 will produce alternating 0s
and 1s, i.e., toggling between 0 and 1. When the internal
Program or Erase operation is completed, the toggling will
stop. The device is then ready for the next operation. The
Toggle Bit is valid after the rising edge of fourth WE# (or
CE#) pulse for Program operation. For Sector- or Chip-
Erase, the Toggle Bit is valid after the rising edge of sixth
WE# (or CE#) pulse. See Figure 8 for Toggle Bit timing dia-
gram and Figure 16 for a flowchart.
Data Protection
The SST39SF010A/020A/040 provide both hardware and
software features to protect nonvolatile data from inadvert-
ent writes.
Hardware Data Protection
Noise/Glitch Protection: A WE# or CE# pulse of less than 5
ns will not initiate a Write cycle.
VDD Power Up/Down Detection: The Write operation is
inhibited when VDD is less than 2.5V.
Write Inhibit Mode: Forcing OE# low, CE# high, or WE#
high will inhibit the Write operation. This prevents inadvert-
ent writes during power-up or power-down.
Software Data Protection (SDP)
The
SST39SF010A/020A/040
provide
the
JEDEC
approved Software Data Protection scheme for all data
alteration operations, i.e., Program and Erase. Any Pro-
gram operation requires the inclusion of a series of three-
byte sequence. The three-byte load sequence is used to
initiate the Program operation, providing optimal protection
from inadvertent Write operations, e.g., during the system
power-up or power-down. Any Erase operation requires the
inclusion of six-byte load sequence. The SST39SF010A/
020A/040 devices are shipped with the Software Data Pro-
tection permanently enabled. See Table 4 for the specific
software
command
codes.
During
SDP
command
sequence, invalid commands will abort the device to read
mode, within TRC.
Product Identification
The Product Identification mode identifies the device as the
SST39SF040, SST39SF010A, or SST39SF020A and
manufacturer as SST. This mode may be accessed by soft-
ware operations. Users may wish to use the software Prod-
uct Identification operation to identify the part (i.e., using the
device ID) when using multiple manufacturers in the same
socket. For details, Table 4 for software operation, Figure
11 for the software ID entry and read timing diagram and
Figure 17 for the ID entry command sequence flowchart.
Product Identification Mode Exit/Reset
In order to return to the standard Read mode, the Software
Product Identification mode must be exited. Exit is accom-
plished by issuing the Exit ID command sequence, which
returns the device to the Read operation. Please note that
the software reset command is ignored during an internal
Program or Erase operation. See Table 4 for software com-
mand codes, Figure 12 for timing waveform and Figure 17
for a flowchart.
TABLE
1: PRODUCT IDENTIFICATION
Address
Data
Manufacturer’s ID
0000H
BFH
Device ID
SST39SF010A
0001H
B5H
SST39SF020A
0001H
B6H
SST39SF040
0001H
B7H
T1.2 1147



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com