6

Data Sheet

1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash

SST39SF010A / SST39SF020A / SST39SF040

©2003 Silicon Storage Technology, Inc.

S71147-06-000

8/04

TABLE

Symbol

Pin Name

Functions

Address Inputs

To provide memory addresses.

Data Input/output

To output data during Read cycles and receive input data during Write cycles.

Data is internally latched during a Write cycle.

The outputs are in tri-state when OE# or CE# is high.

CE#

Chip Enable

To activate the device when CE# is low.

OE#

Output Enable

To gate the data output buffers.

WE#

Write Enable

To control the Write operations.

Power Supply

To provide 5.0V supply (4.5-5.5V)

Ground

NC

No Connection

Unconnected pins.

T2.2 1147

TABLE

Mode

CE#

OE#

WE#

DQ

Address

Read

Program

Erase

Sector address,

XXH for Chip-Erase

Standby

X

X

High Z

X

Write Inhibit

X

X

X

XX

X

Product Identification

Software Mode

See Table 4

T3.3 1147