SST39SF040 datasheet(8/24 Pages) SST

8 / 24 page

Data Sheet

1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash

SST39SF010A / SST39SF020A / SST39SF040

S71147-06-000

8/04

TABLE

5: DC OPERATING CHARACTERISTICS VDD = 4.5-5.5V1

Symbol

Parameter

Limits

Test Conditions

Min

Max

Units

IDD

Power Supply Current

Address input=VILT/VIHT, at f=1/TRC Min

VDD=VDD Max

CE#=VIL, OE#=WE#=VIH, all I/Os open

Program and Erase

CE#=WE#=VIL, OE#=VIH

ISB1

Standby VDD Current

(TTL input)

3mA

CE#=VIH, VDD=VDD Max

ISB2

Standby VDD Current

(CMOS input)

100

µA

CE#=VIHC, VDD=VDD Max

ILI

Input Leakage Current

µA

VIN=GND to VDD, VDD=VDD Max

ILO

Output Leakage Current

µA

VOUT=GND to VDD, VDD=VDD Max

VIL

Input Low Voltage

0.8

VDD=VDD Min

VIH

Input High Voltage

2.0

VDD=VDD Max

VIHC

Input High Voltage (CMOS)

VDD-0.3

VDD=VDD Max

VOL

Output Low Voltage

0.4

IOL=2.1 mA, VDD=VDD Min

VOH

Output High Voltage

2.4

IOH=-400 µA, VDD=VDD Min

T5.10 1147

1. Typical conditions for the Active Current shown on the front data sheet page are average values at 25°C

(room temperature), and VDD = 5V for SF devices. Not 100% tested.

2. Values are for 70 ns conditions. See the Multi-Purpose Flash Power Rating application note for further information.

TABLE

6: RECOMMENDED SYSTEM POWER-UP TIMINGS

Symbol

Parameter

Minimum

Units

TPU-READ1

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

Power-up to Read Operation

100

µs

TPU-WRITE1

Power-up to Program/Erase Operation

100

µs

T6.1 1147

TABLE

7: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open)

Parameter

Description

Test Condition

Maximum

CI/O1

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

I/O Pin Capacitance

VI/O = 0V

12 pF

CIN1

Input Capacitance

VIN = 0V

6 pF

T7.0 1147

TABLE

8: RELIABILITY CHARACTERISTICS

Symbol

Parameter

Minimum Specification

Units

Test Method

NEND1,2

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

2. NEND endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a

higher minimum specification.

Endurance

10,000

Cycles

JEDEC Standard A117

TDR1

Data Retention

100

Years

JEDEC Standard A103

ILTH1

Latch Up

100 + IDD

JEDEC Standard 78

T8.2 1147

SST39SF040 数据表(PDF) 8 Page - Silicon Storage Technology, Inc

SST39SF040 数据表(HTML) 8 Page - Silicon Storage Technology, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

数据表下载

链接网址

SST39SF040 数据表(PDF) 8 Page - Silicon Storage Technology, Inc

SST39SF040 数据表(HTML) 8 Page - Silicon Storage Technology, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

数据表 下载

链接网址

数据表下载