Data Sheet

1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash

SST39SF010A / SST39SF020A / SST39SF040

13

©2003 Silicon Storage Technology, Inc.

S71147-06-000

8/04

1147 F17.1

ADDRESS AMS-0

Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are

interchageable as long as minimum timings are met. (See Table 10)

SAX = Sector Address

AMS = Most significant address

AMS = A16 for SST39SF010A, A17 for SST39SF020A, and A18 for SST39SF040

DQ7-0

WE#

SW0

SW1

SW2

SW3

SW4

SW5

5555

2AAA

2AAA

5555

5555

55

10

55

AA

80

AA

5555

OE#

CE#

SIX-BYTE CODE FOR CHIP-ERASE

TSCE

TWP

1147 F09.2

ADDRESS A14-0

TIDA

DQ7-0

WE#

SW0

SW1

SW2

5555

2AAA

5555

0000

0001

OE#

CE#

Three-byte Sequence for

Software ID Entry

TWP

TWPH

TAA

BF

Device ID

55

AA

90

Device ID = B5H for SST39SF010A, B6H for SST39SF020A, and B7H for SST39SF040