Mode 3: Vsense < 20 mV over the Vicm range

The TSC20x has not been designed to measure extremely low current, or rather low input differential voltage.

When the voltage across the shunt resistor becomes lower than 20 mV, a larger than normal offset can appear.

For example, for the TSC200, an output voltage Vout = 0.4 V max can be measured while the Vsense = 0 V, which

leads to output errors higher than expected.

As seen in the previous chapter, the way the TSC20x family works is to transform a small differential input Vsense

into a proportional current Ir, and then amplify it through the internal resistance R2.

But when the Vsense voltage is too low, the Ir current becomes very low as well and the transconductance of the

transistor becomes very low, as a consequence of a loss of precision for Vsense < 20 mV.

Figure 33 and Figure 34 describe the output voltage distribution of a large amount of TSC200 samples when the

differential input voltage Vsense = 0 V, for a input common voltage Vicm = 0 V and Vicm = 12 V.

Figure 33. VOUT when Vsense = 0 V, VCC = 5 V, Vicm = 0 V

T=25°C

Vcc=5V,

Vicm=0V

Output Voltage (mV)

Figure 34. VOUT when Vsense = 0 V, VCC = 5 V, Vicm = 12 V

T=25°C

Vcc=5V,

Vicm=12V

Output Voltage (mV)

Vicm = 40% VCC

The transition Vicm = 40% VCC is the most sensitive one as it is a transition between the A1 and A2 amplifiers.

While the architecture has been optimized to smooth this transition, a change in Vio can be observed at this step,

as demonstrated in Figure 35.

Figure 35. Input voltage offset over Vicm and temperature

-10

0

10

20

30

40

50

60

70

80

0

20

40

60

80

-300

-200

-100

0

100

200

300

400

500

-200

0

200

400

T=25°C

T=125°C

Vcc=12V

T=-40°C

Transition at Vicm = 40% Vcc

Vicm (V)

TSC200, TSC201, TSC202

Theory of operation

DS13882 - Rev 2

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