M28W320FCT datasheet(55/69 Pages) STMICROELECTRONICS

55 / 69 page

M28W320FCT, M28W320FCB

Common Flash Interface (CFI)

55/69

(P+F)h = 44h

0080h

Protection Field 1: Protection Description

This field describes user-available. One Time Programmable (OTP)

Protection register bytes. Some are pre-programmed with device unique

serial numbers. Others are user programmable. Bits 0–15 point to the

Protection register Lock byte, the section’s first byte.

The following bytes are factory pre-programmed and user-programmable.

bit 0 to 7 Lock/bytes JEDEC-plane physical low address

bit 8 to 15Lock/bytes JEDEC-plane physical high address

bit 16 to 23 "n" such that 2n = factory pre-programmed bytes

bit 24 to 31 "n" such that 2n = user programmable bytes

80h

(P+10)h = 45h

0000h

00h

(P+11)h = 46h

0003h

8 Byte

(P+12)h = 47h

0003h

8 Byte

(P+13)h = 48h

Reserved

See Table 27, offset 15 for P pointer definition.

Table 30.

Primary Algorithm-Specific Extended Query Table

Offset

P = 35h (1)

Data

Description

Value

Table 31.

Security Code Area

Offset

Data

Description

80h

00XX

Protection Register Lock

81h

XXXX

64 bits: unique device number

82h

XXXX

83h

XXXX

84h

XXXX

85h

XXXX

128 bits: User Programmable OTP

86h

XXXX

87h

XXXX

88h

XXXX

89h

XXXX

8Ah

XXXX

8Bh

XXXX

8Ch

XXXX

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