SCF5249 datasheet(9/56 Pages) FREESCALE

9 / 56 page

SCF5249 Functional Overview

SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3

Freescale Semiconductor

5.8

External Bus Interface

The bus interface controller transfers information between the ColdFire core or DMA and memory,

peripherals, or other devices on the external bus. The external bus interface provides 23 bits of address bus

space, a 16-bit data bus, Output Enable, and Read/Write signals. This interface implements an extended

synchronous protocol that supports bursting operations.

5.9

Serial Audio Interfaces

The SCF5249 digital audio interface provides four serial Philips IIS/Sony EIAJ interfaces. One interface

is a 4-pin (1 bit clock, 1 word clock, 1 data in, 1 data out), the other three interfaces are 3-pin (1 bit clock,

1 word clock, 1 data in or out). The serial interfaces have no limit on minimum sampling frequency.

Maximum sampling frequency is determined by maximum frequency on bit clock input. This is 1/3 the

frequency of the internal system clock.

5.10 IEC958 Digital Audio Interfaces

The SCF5249 has two digital audio input interfaces, and one digital audio output interface. There are four

digital audio input pins, two digital audio output pins. An internal multiplexer selects one of the four inputs

to the digital audio input interface. There is one digital audio output interface but it has two IEC958

outputs. One output carries the professional “c” channel, and the other carries the consumer “c” channel.

The rest carry identical data.

The IEC958 output can take the output from the internal IEC958 generator, or multiplex out one of the

four IEC958 inputs.

5.11 Audio Bus

The audio interfaces connect to an internal bus that carries all audio data. Each receiver places its received

data on the audio bus and each transmitter takes data from the audio bus for transmission. Each transmitter

has a source select register.

In addition to the audio interfaces, there are six CPU accessible registers connected to the audio bus. Three

of these registers allow data reads from the audio bus and allow selection of the audio source. The other

three register provide a write path to the audio bus and can be selected by transmitters as the audio source.

Through these registers, the CPU has access to the audio samples for processing.

Audio can be routed from a receiver to a transmitter without the data being processed by the core so the

audio bus can be used as a digital audio data switch. The audio bus can also be used for audio format

conversion.

5.12 CD-ROM Encoder/Decoder

The SCF5249 is capable of processing CD-ROM sectors in hardware. Processing is compliant with

CD-ROM and CD-ROM XA standards.

SCF5249 数据表(PDF) 9 Page - Freescale Semiconductor, Inc

SCF5249 数据表(HTML) 9 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

数据表下载